8000 [Bug]: Incorrect MFMA Peak FLOPs Calculations for BF16 and F16 in `gfx941/0200_system-speed-of-light.yaml · Issue #700 · ROCm/rocprofiler-compute · GitHub
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[Bug]: Incorrect MFMA Peak FLOPs Calculations for BF16 and F16 in `gfx941/0200_system-speed-of-light.yaml #700

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ajassani opened this issue May 7, 2025 · 1 comment
Open

[Bug]: Incorrect MFMA Peak FLOPs Calculations for BF16 and F16 in `gfx941/0200_system-speed-of-light.yaml #700

ajassani opened this issue May 7, 2025 · 1 comment
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ajassani commented May 7, 2025 •
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Describe the bug

While validating peak throughput calculations on MI300X, I noticed that the MFMA metrics for BF16 and F16 in gfx941/0200_system-speed-of-light.yaml assume 4096 FLOPs per cycle per CU:

peak: ((($max_sclk * $cu_per_gpu) * 4096) / 1000)

This is incorrect. According to the CDNA3 whitepaper, Table 1, the correct peak throughput for BF16 and F16 MFMA is 2048 FLOPs per cycle per CU. The corrected expression should be:

peak: ((($max_sclk * $cu_per_gpu) * 2048) / 1000)

Other MFMA-related metrics such as F8, F32, F64, and I8 appear to follow a similar pattern and may also require review. Let me know how you'd prefer to track those.
Thanks.

Linux Distribution

NA

ROCm Compute Profiler Version

NA

GPU

AMD MI300X

ROCm Version

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Reproducer

Shared the code snippet from src

Expected behavior

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          @ajassani
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Thanks for pointing out!  Will have a quick look then back to you.

      		
    

  





        


            

            
            

              
            

        

      


      

            
  

    
  
    
    

  

  


    
















  
  

    

      

  





  




  
  

              

  
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