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#define M2K_LA_REG_TRIGGERED 0x48
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#define M2K_LA_REG_STREAMING 0x4c
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#define M2K_LA_REG_INSTRUMENT_TRIGGER 0x54
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+ #define M2K_LA_REG_DATA_DELAY_CONFIG 0x58
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#define M2K_LA_TRIGGER_EDGE_ANY 0
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#define M2K_LA_TRIGGER_EDGE_RISING 1
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#define M2K_LA_TRIGGER_SOURCE_MASK GENMASK(19, 16)
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#define M2K_LA_TRIGGER_EXT_SOURCE_MASK GENMASK(17, 16)
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+ #define M2K_LA_IN_DATA_DELAY_MASK GENMASK(5, 0)
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+ #define M2K_LA_IN_DATA_AUTO_DELAY_MASK BIT(8)
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+ #define M2K_LA_IN_DATA_DELAY_MUX_MASK BIT(9)
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+
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struct m2k_la {
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void __iomem * regs ;
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@@ -391,6 +396,120 @@ static ssize_t m2k_la_get_triggered(struct iio_dev *indio_dev,
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return scnprintf (buf , PAGE_SIZE , "%d\n" , val );
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}
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+ static int m2k_la_set_data_delay_auto (struct iio_dev * indio_dev ,
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+ const struct iio_chan_spec * chan , unsigned int val )
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+ {
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+ struct m2k_la * m2k_la = iio_device_get_drvdata (indio_dev );
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+
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+ mutex_lock (& m2k_la -> lock );
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+
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+ m2k_la_update (m2k_la , M2K_LA_REG_DATA_DELAY_CONFIG ,
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+ FIELD_PREP (M2K_LA_IN_DATA_AUTO_DELAY_MASK , val ),
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+ M2K_LA_IN_DATA_AUTO_DELAY_MASK );
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+
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+ mutex_unlock (& m2k_la -> lock );
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+
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+ return 0 ;
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+ }
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+
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+ static int m2k_la_get_data_delay_auto (struct iio_dev * indio_dev ,
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+ const struct iio_chan_spec * chan )
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+ {
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+ struct m2k_la * m2k_la = iio_device_get_drvdata (indio_dev );
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+ unsigned int val ;
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+
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+ val = m2k_la_read (m2k_la , M2K_LA_REG_DATA_DELAY_CONFIG );
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+ val = FIELD_GET (M2K_LA_IN_DATA_AUTO_DELAY_MASK , val );
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+
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+ return val ;
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+ }
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+
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+ static const char * const m2k_la_data_delay_auto_items [] = {
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+ "auto" ,
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+ "manual"
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+ };
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+
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+ static const struct iio_enum m2k_la_data_delay_auto_enum = {
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+ .items = m2k_la_data_delay_auto_items ,
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+ .num_items = ARRAY_SIZE (m2k_la_data_delay_auto_items ),
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+ .set = m2k_la_set_data_delay_auto ,
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+ .get = m2k_la_get_data_delay_auto ,
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+ };
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+
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+ static int m2k_la_set_rate_mux (struct iio_dev * indio_dev ,
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+ const struct iio_chan_spec * chan , unsigned int val )
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+ {
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+ struct m2k_la * m2k_la = iio_device_get_drvdata (indio_dev );
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+
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+ mutex_lock (& m2k_la -> lock );
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+
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+ m2k_la_update (m2k_la , M2K_LA_REG_DATA_DELAY_CONFIG ,
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+ FIELD_PREP (M2K_LA_IN_DATA_DELAY_MUX_MASK , val ),
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+ M2K_LA_IN_DATA_DELAY_MUX_MASK );
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+
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+ mutex_unlock (& m2k_la -> lock );
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+
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+ return 0 ;
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+ }
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+
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+ static int m2k_la_get_rate_mux (struct iio_dev * indio_dev ,
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+ const struct iio_chan_spec * chan )
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+ {
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+ struct m2k_la * m2k_la = iio_device_get_drvdata (indio_dev );
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+ unsigned int val ;
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+
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+ val = m2k_la_read (m2k_la , M2K_LA_REG_DATA_DELAY_CONFIG );
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+ val = FIELD_GET (M2K_LA_IN_DATA_DELAY_MUX_MASK , val );
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+
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+ return val ;
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+ }
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+
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+ static const char * const m2k_la_rate_mux_items [] = {
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+ "logic_analyzer" ,
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+ "oscilloscope"
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+ };
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+
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+ static const struct iio_enum m2k_la_rate_mux_enum = {
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+ .items = m2k_la_rate_mux_items ,
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+ .num_items = ARRAY_SIZE (m2k_la_rate_mux_items ),
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+ .set = m2k_la_set_rate_mux ,
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+ .get = m2k_la_get_rate_mux ,
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+ };
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+
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+ static ssize_t m2k_la_set_in_data_delay (struct iio_dev * indio_dev ,
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+ uintptr_t priv , const struct iio_chan_spec * chan , const char * buf ,
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+ size_t len )
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+ {
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+ struct m2k_la * m2k_la = iio_device_get_drvdata (indio_dev );
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+ unsigned int val ;
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+ int ret ;
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+
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+ ret = kstrtouint (buf , 10 , & val );
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+ if (ret < 0 )
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+ return ret ;
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+
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+ mutex_lock (& m2k_la -> lock );
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+
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+ m2k_la_update (m2k_la , M2K_LA_REG_DATA_DELAY_CONFIG , val ,
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+ M2K_LA_IN_DATA_DELAY_MASK );
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+
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+ mutex_unlock (& m2k_la -> lock );
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+
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+ return len ;
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+ }
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+
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+ static ssize_t m2k_la_get_in_data_delay (struct iio_dev * indio_dev ,
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+ uintptr_t priv , const struct iio_chan_spec * chan , char * buf )
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+ {
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+ struct m2k_la * m2k_la = iio_device_get_drvdata (indio_dev );
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+ unsigned int val ;
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+
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+ val = m2k_la_read (m2k_la , M2K_LA_REG_DATA_DELAY_CONFIG );
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+ val = FIELD_GET (M2K_LA_IN_DATA_DELAY_MASK , val );
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+
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+ return scnprintf (buf , PAGE_SIZE , "%u\n" , val );
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+ }
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+
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static ssize_t m2k_la_get_streaming (struct iio_dev * indio_dev ,
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uintptr_t priv , const struct iio_chan_spec * chan , char * buf )
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{
@@ -430,6 +549,14 @@ static const struct iio_chan_spec_ext_info m2k_la_rx_ext_info[] = {
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& m2k_la_trigger_mux_out_enum ),
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IIO_ENUM_AVAILABLE ("trigger_mux_out" ,
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& m2k_la_trigger_mux_out_enum ),
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+ IIO_ENUM ("data_delay_auto" , IIO_SHARED_BY_ALL ,
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+ & m2k_la_data_delay_auto_enum ),
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+ IIO_ENUM_AVAILABLE_SHARED ("data_delay_auto" , IIO_SHARED_BY_ALL ,
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+ & m2k_la_data_delay_auto_enum ),
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+ IIO_ENUM ("rate_mux" , IIO_SHARED_BY_ALL ,
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+ & m2k_la_rate_mux_enum ),
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+ IIO_ENUM_AVAILABLE_SHARED ("rate_mux" , IIO_SHARED_BY_ALL ,
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+ & m2k_la_rate_mux_enum ),
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{
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.name = "trigger_delay" ,
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.shared = IIO_SHARED_BY_TYPE ,
@@ -442,6 +569,12 @@ static const struct iio_chan_spec_ext_info m2k_la_rx_ext_info[] = {
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.read = m2k_la_get_triggered ,
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.write = m2k_la_set_triggered ,
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},
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+ {
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+ .name = "data_in_delay" ,
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+ .shared = IIO_SHARED_BY_ALL ,
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+ .read = m2k_la_get_in_data_delay ,
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+ .write = m2k_la_set_in_data_delay ,
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+ },
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{
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.name = "streaming" ,
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.shared = IIO_SHARED_BY_ALL ,
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