@@ -494,6 +494,21 @@ static const struct attribute_group cf_axi_int_attribute_group = {
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.attrs = cf_axi_attributes ,
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};
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+ static int cf_axi_dds_reg_index (struct iio_chan_spec const * chan )
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+ {
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+ if (chan -> modified )
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+ switch (chan -> channel2 ) {
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+ case IIO_MOD_I :
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+ return chan -> channel * 2 ;
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+ case IIO_MOD_Q :
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+ return chan -> channel * 2 + 1 ;
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+ default :
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+ return chan -> channel ;
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+ }
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+
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+ return chan -> channel ;
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+ }
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+
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static int cf_axi_dds_read_raw (struct iio_dev * indio_dev ,
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struct iio_chan_spec const * chan ,
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int * val ,
@@ -504,7 +519,7 @@ static int cf_axi_dds_read_raw(struct iio_dev *indio_dev,
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struct cf_axi_converter * conv ;
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unsigned long long val64 ;
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unsigned long freq ;
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- unsigned int reg , phase = 0 ;
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+ unsigned int reg , channel , phase = 0 ;
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int ret ;
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mutex_lock (& indio_dev -> mlock );
@@ -565,11 +580,12 @@ static int cf_axi_dds_read_raw(struct iio_dev *indio_dev,
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phase = 1 ;
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/* fall-through */
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case IIO_CHAN_INFO_CALIBSCALE :
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+ channel = cf_axi_dds_reg_index (chan );
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- reg = dds_read (st , ADI_REG_CHAN_CNTRL_8 (chan -> channel ));
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+ reg = dds_read (st , ADI_REG_CHAN_CNTRL_8 (channel ));
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/* format is 1.1.14 (sign, integer and fractional bits) */
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- if (!((phase + chan -> channel ) % 2 ))
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+ if (!((phase + channel ) % 2 ))
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reg = ADI_TO_IQCOR_COEFF_1 (reg );
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else
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reg = ADI_TO_IQCOR_COEFF_2 (reg );
@@ -599,7 +615,7 @@ static int cf_axi_dds_write_raw(struct iio_dev *indio_dev,
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struct cf_axi_dds_state * st = iio_priv (indio_dev );
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struct cf_axi_converter * conv ;
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unsigned long long val64 ;
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- unsigned int reg , i , phase = 0 ;
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+ unsigned int reg , i , channel , phase = 0 ;
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int ret = 0 ;
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if (st -> dev_spi )
@@ -730,23 +746,24 @@ static int cf_axi_dds_write_raw(struct iio_dev *indio_dev,
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phase = 1 ;
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/* fall-through */
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case IIO_CHAN_INFO_CALIBSCALE :
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+ channel = cf_axi_dds_reg_index (chan );
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ret = cf_axi_dds_to_signed_mag_fmt (val , val2 , & i );
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if (ret < 0 )
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break ;
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- reg = dds_read (st , ADI_REG_CHAN_CNTRL_8 (chan -> channel ));
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+ reg = dds_read (st , ADI_REG_CHAN_CNTRL_8 (channel ));
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- if (!((chan -> channel + phase ) % 2 )) {
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+ if (!((channel + phase ) % 2 )) {
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reg &= ~ADI_IQCOR_COEFF_1 (~0 );
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reg |= ADI_IQCOR_COEFF_1 (i );
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} else {
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reg &= ~ADI_IQCOR_COEFF_2 (~0 );
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reg |= ADI_IQCOR_COEFF_2 (i );
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}
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- dds_write (st , ADI_REG_CHAN_CNTRL_8 (chan
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-> channel ), reg );
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- dds_write (st , ADI_REG_CHAN_CNTRL_6 (chan -> channel ),
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+ dds_write (st , ADI_REG_CHAN_CNTRL_8 (channel ), reg );
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+ dds_write (st , ADI_REG_CHAN_CNTRL_6 (channel ),
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ADI_IQCOR_ENB );
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break ;
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default :
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