8000 iio: frequency: cf_axi_dds: Fix rotation matrix for modified channels · analogdevicesinc/linux@5592fcb · GitHub
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mhennerichcommodo
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iio: frequency: cf_axi_dds: Fix rotation matrix for modified channels
In case channels are IQ modified, they share the same channel number. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
1 parent 0558574 commit 5592fcb

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+25
-8
lines changed

1 file changed

+25
-8
lines changed

drivers/iio/frequency/cf_axi_dds.c

Lines changed: 25 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -494,6 +494,21 @@ static const struct attribute_group cf_axi_int_attribute_group = {
494494
.attrs = cf_axi_attributes,
495495
};
496496

497+
static int cf_axi_dds_reg_index(struct iio_chan_spec const *chan)
498+
{
499+
if (chan->modified)
500+
switch (chan->channel2) {
501+
case IIO_MOD_I:
502+
return chan->channel * 2;
503+
case IIO_MOD_Q:
504+
return chan->channel * 2 + 1;
505+
default:
506+
return chan->channel;
507+
}
508+
509+
return chan->channel;
510+
}
511+
497512
static int cf_axi_dds_read_raw(struct iio_dev *indio_dev,
498513
struct iio_chan_spec const *chan,
499514
int *val,
@@ -504,7 +519,7 @@ static int cf_axi_dds_read_raw(struct iio_dev *indio_dev,
504519
struct cf_axi_converter *conv;
505520
unsigned long long val64;
506521
unsigned long freq;
507-
unsigned int reg, phase = 0;
522+
unsigned int reg, channel, phase = 0;
508523
int ret;
509524

510525
mutex_lock(&indio_dev->mlock);
@@ -565,11 +580,12 @@ static int cf_axi_dds_read_raw(struct iio_dev *indio_dev,
565580
phase = 1;
566581
/* fall-through */
567582
case IIO_CHAN_INFO_CALIBSCALE:
583+
channel = cf_axi_dds_reg_index(chan);
568584

569-
reg = dds_read(st, ADI_REG_CHAN_CNTRL_8(chan->channel));
585+
reg = dds_read(st, ADI_REG_CHAN_CNTRL_8(channel));
570586
/* format is 1.1.14 (sign, integer and fractional bits) */
571587

572-
if (!((phase + chan->channel) % 2))
588+
if (!((phase + channel) % 2))
573589
reg = ADI_TO_IQCOR_COEFF_1(reg);
574590
else
575591
reg = ADI_TO_IQCOR_COEFF_2(reg);
@@ -599,7 +615,7 @@ static int cf_axi_dds_write_raw(struct iio_dev *indio_dev,
599615
struct cf_axi_dds_state *st = iio_priv(indio_dev);
600616
struct cf_axi_converter *conv;
601617
unsigned long long val64;
602-
unsigned int reg, i, phase = 0;
618+
unsigned int reg, i, channel, phase = 0;
603619
int ret = 0;
604620

605621
if (st->dev_spi)
@@ -730,23 +746,24 @@ static int cf_axi_dds_write_raw(struct iio_dev *indio_dev,
730746
phase = 1;
731747
/* fall-through */
732748
case IIO_CHAN_INFO_CALIBSCALE:
749+
channel = cf_axi_dds_reg_index(chan);
733750

734751
ret = cf_axi_dds_to_signed_mag_fmt(val, val2, &i);
735752
if (ret < 0)
736753
break;
737754

738-
reg = dds_read(st, ADI_REG_CHAN_CNTRL_8(chan->channel));
755+
reg = dds_read(st, ADI_REG_CHAN_CNTRL_8(channel));
739756

740-
if (!((chan->channel + phase) % 2)) {
757+
if (!((channel + phase) % 2)) {
741758
reg &= ~ADI_IQCOR_COEFF_1(~0);
742759
reg |= ADI_IQCOR_COEFF_1(i);
743760
} else {
744761
reg &= ~ADI_IQCOR_COEFF_2(~0);
745762
reg |= ADI_IQCOR_COEFF_2(i);
746763
}
747764

748-
dds_write(st, ADI_REG_CHAN_CNTRL_8(chan 5945 ->channel), reg);
749-
dds_write(st, ADI_REG_CHAN_CNTRL_6(chan->channel),
765+
dds_write(st, ADI_REG_CHAN_CNTRL_8(channel), reg);
766+
dds_write(st, ADI_REG_CHAN_CNTRL_6(channel),
750767
ADI_IQCOR_ENB);
751768
break;
752769
default:

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