8000 Attiny85's PLOCK bit never sets (the PLL never locks) · Issue #474 · buserror/simavr · GitHub
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Attiny85's PLOCK bit never sets (the PLL never locks) #474

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packocrayons opened this issue Jan 8000 31, 2022 · 4 comments
Open

Attiny85's PLOCK bit never sets (the PLL never locks) #474

packocrayons opened this issue Jan 31, 2022 · 4 comments

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@packocrayons
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packocrayons commented Jan 31, 2022

The following MWE reproduces the issue:

#include <avr/io.h>
#include <util/delay.h>

int main(){
        PLLCSR = (1 << PLLE);
        _delay_us(100);
        while (! (PLLCSR & (1 << PLOCK)));
        PLLCSR |= (1 << PCKE);
}

Running with simavr and avr-gdb (-ggdb -Og) and a breakpoint on line 8 (the PCKE line), never breaks. The emulator gets stuck on line 7 waiting for "hardware" to set the PLOCK bit to confirm that the PLL is locked

avr-gcc -mmcu=attiny85 -Wall -DF_CPU=8000000 -Og -ggdb -o main main.c

P.S. I would be happy to work on this issue, given a pointer on where to start to emulate the PLL

@gatk555
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gatk555 commented Feb 2, 2022

My guess is that the counter/timer code (avr_timer.*) is the natural home for that. The data sheet documents PLLCSR in the counter/timer section.

This link may be useful: other AVRs with PLL.

@sergeyyarkov
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sergeyyarkov commented Mar 28, 2025

Same here. Need to manually set PLOCK bit To run my code.

@gatk555
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gatk555 commented Apr 2, 2025

What would be an acceptable fix? If internal source is used a simple time delay might be enough. But one might require that the bit is never set if the external input has too much jitter. And what will you do with the output? AFAIK clocking a timer from PLL is not implemented,

@buserror
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buserror commented Apr 3, 2025

I'd be happy with a timer; the idea is to make the firmware beleive it's working properly (and not lock up!) so toggling that bit after X cycles makes perfect sense to me.

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