Lists (1)
Stars
SystemVerilog support in VS Code
VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!
A digital logic designer and circuit simulator.
RARS -- RISC-V Assembler and Runtime Simulator
Simple template-based UVM code generator
A Fast, Low-Overhead On-chip Network
Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server
Apache Superset is a Data Visualization and Data Exploration Platform
List of awesome open source hardware projects
List of awesome open source hardware tools, generators, and reusable designs
List of awesome semiconductor startups
High performance, multi-platform VNC client and server
Conteúdos para quem trabalha com Programação e Tecnologia.
Save all your Mac apps for later with one click 🖱️
A dependency management tool for hardware projects.
Documentation that simply works
SystemVerilog modules and classes commonly used for verification
AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
Visualizer for neural network, deep learning and machine learning models
Digital timing diagram editor
🌊 Digital timing diagram rendering engine
Modular hardware build system