8000 Release Artifact · IObundle/iob-soc · GitHub
[go: up one dir, main page]
More Web Proxy on the site http://driver.im/
Skip to content

Artifact

Latest
Latest
Compare
Choose a tag to compare
@jjts jjts released this 12 May 20:44
· 8 commits to main since this release
V0.83
4a635af
This commit was created on GitHub.com and signed with GitHub’s verified signature.
GPG key ID: B5690EEEBB952194
Verified
Learn about vigilant mode.

In this release, we distribute artifacts with all the generated code and makefiles to allow the user to build the hardware from Verilog and the software from C code.

What's Changed

  • feat(setup): Use new setup process: Call iob_soc.py directly. by @arturum1 in #599
  • Fix iob-soc setup process by @arturum1 in #602
  • Merge python-setup branch by @arturum1 in #603
  • fix(AXI): Fix AXI submodule url. by @arturum1 in #609
  • merge(main); Merge main into if_gen by @P-Miranda in #623
  • Resolve issues by @arturum1 in #634
  • Small fix to portmap interface names by @arturum1 in #775
  • Refactor iob_soc class; Merge main. by @arturum1 in #776
  • Use instance attributes/methods instead of class ones by @arturum1 in #792
  • Continue devel of *_gen files and functions. by @arturum1 in #794
  • Merge branch 'main' of github.com:IObundle/iob-soc into if_gen2 by @arturum1 in #797
  • fix(sim): fix iob-soc simulation by @P-Miranda in #802
  • Sketch for structure with dataclasses and merge _setup() into __init__(). by @arturum1 in #798
  • Sketch for: list of objects instead of dictionaries; removal of peripheral_portmap; Use py2hw syntax to generate iob_soc.v. by @arturum1 in #803
  • refactor(py2hw): Rename wires, ports, and groups by @arturum1 in #806
  • refactor(iob_soc.py): Remove dataclass by @arturum1 in #808
  • refactor(iob_soc.py): Use create_* methods to generate wires, ports, and groups. by @arturum1 in #813
  • Refactor iob_soc.py by @arturum1 in #815
  • Update iob_aoi.py and submodules by @arturum1 in #816
  • Fix py2hw setup process using previously agreed-upon py2hw syntax by @arturum1 in #821
  • Fix py2hw setup process using previously agreed-upon py2hw syntax by @arturum1 in #824
  • Add support for py2hw dictionaries and py2hw JSON files. by @arturum1 in #829
  • Improve py2hwsw setup process; Merge old if_gen branch. by @arturum1 in #835
  • Remove all except modules from lib by @Edw590 in #836
  • Almost all hw modules converted to py2hwsw syntax by @Edw590 in #838
  • Fix py2hwsw modules and test scripts; Try to add py2hwsw to Nix. by @arturum1 in #840
  • Update Nix to use new py2hwsw version by @arturum1 in #844
  • Corrections in Verilog code of hw modules by @Edw590 in #843
  • Fix lib modules; Update py2hwsw version. by @arturum1 in #846
  • Merge branch 'main' into if_gen2 by @arturum1 in #860
  • new iob_reg.py by @mbot27 in #868
  • feat(fifo2axis): update fifo2axis module by @P-Miranda in #872
  • new iob_reg.py and iob_pulse_gen.py by @mbot27 in #870
  • reg module generated automatically with py2hwsw by @mbot27 in #873
  • [WIP] Generate IOb-SoC with py2hwsw by @arturum1 in #874
  • Update revamp2 and BOOTCTR as peripheral by @Edw590 in #877
  • sync module generated automatically with py2hwsw by @mbot27 in #875
  • module iob_clkbuf generated with py2hwsw by @mbot27 in #878
  • module iob_clkmux generated with py2hwsw by @mbot27 in #879
  • Remove macros from some modules by @Edw590 in #880
  • module iob_int_sqrt generated with py2hwsw by @mbot27 in #881
  • generate iob_iobuf with py2hwsw by @mbot27 in #883
  • Fix iob-soc simulation with USE_EXTMEM=0 by @arturum1 in #884
  • More preparations for BOOTCTR to work by @Edw590 in #882
  • Merge Artur's changes into revamp2 by @Edw590 in #885
  • fix(iob_pack): Add missing prefix in include by @arturum1 in #886
  • changes in module iob_int_sqrt by @mbot27 in #887
  • feat(nix): Update Py2HWSW version by @agrevin in #888
  • feat(lib): axis_tasks; mul add shift module by @P-Miranda in #889
  • generate module iob_reverse with py2hwsw by @mbot27 in #890
  • Fix all Makefile targets except FPGA. by @arturum1 in #892
  • generate module iob_xor with py2hwsw by @mbot27 in #891
  • module counter generated with py2hwsw by @mbot27 in #893
  • BOOTCTR is copying the bootloader to memory and merge with if_gen2 by @Edw590 in #895
  • Use new py_params argument separator : by @arturum1 in #897
  • Move iob-picorv32 to lib and remove submodule by @Edw590 in #894
  • int_mem removed and bootloader partially executing by @Edw590 in #896
  • Remove basic gates and registers addressing #818 by @agrevin in #898
  • Firmware is running by @Edw590 in #899
  • module iob_piso_reg generated with py2hwsw by @mbot27 in #900
  • CPU jumps between programs instead of restarting by @Edw590 in #901
  • module altddio_in generated with py2hwsw by @mbot27 in #902
  • module atlddio_out generated with py2hwsw by @mbot27 in #903
  • Generate fpga wrappers with py2. Add py2 wrappers for xilinx and altera modules. by @arturum1 in #904
  • module rom generated with py2hwsw by @mbot27 in #907
  • module iob_fp generated with py2hwsw by @mbot27 in #909
  • Enable ku040 wrapper; Update py2hwsw version; Remove unused wrapper scripts. by @arturum1 in #906
  • Use new csrs lib module from py2hwsw; Generate iob_nco and iob_timer with py2hwsw. by @arturum1 in #910
  • Some updates on revamp2 by @Edw590 in #908
  • Fix bugs in ku040 wrapper with USE_EXTMEM=1 by @arturum1 in #912
  • Resolve issues by @arturum1 in #916
  • Add iob-axis modules in lib and update to use py2hwsw syntax. by @arturum1 in #917
  • module div generated with py2hwsw by @mbot27 in #911
  • Use new py2 version; iob_div_subshift_frac now uses fsm attribute by @agrevin in #919
  • feat(nco): nco improvements by @P-Miranda in #915
  • Update py2 to fix state number bug by @agrevin in #920
  • fix(axis-in): remove DATA register from axis in by @P-Miranda in #918
  • Iob wishbone2iob by @mbot27 in #922
  • Add iob_gpio and iob_regfileif; Simplify Makefile; by @arturum1 in #923
  • Possible to choose FW start address and stack size, Cyclone tests fixed, AXI removed, merge with if_gen2 by @Edw590 in #913
  • feat(mem): rename memories; iob_ram_2p by @P-Miranda in #926
  • Use DDR_ADDR_W for DDR instead by @Edw590 in #928
  • Update iob_axistream cores; Inherit confs from regfileif instantiator; Merge 'main' branch. by @arturum1 in #929
  • Fix need for ADDR-4 on preboot.S by @Edw590 in #930
  • Update bootrom with new py2hwsw csrs. by @arturum1 in #931
  • Rename fpga folders; Refactor kintex wrapper; Fix bugs and clean target; Update py2hwsw. by @arturum1 in #932
  • Merge Revamp2; Refactor iob-soc. by @arturum1 in #936
  • Refactor iob-soc wrappers; Add axi_interconnect_wrapper module; Generate bootrom with py2. by @arturum1 in #937
  • module iob_ram_sp_generated with py2hwsw by @mbot27 in #939
  • Add missing regs in lib modules; Add PY2HWSW_PATH environment variable; Update py2hwsw. by @arturum1 in #940
  • module iob_ram_2p generated with py2hwsw by @mbot27 in #941
  • Ram2 by @mbot27 in #943
  • Create iob_rom_2p by @arturum1 in #944
  • Add VexRiscv CPU; Use system structure similar to iob_soc_opencryptolinux. by @arturum1 in #945
  • Create iob_axil_split module; Use single axi2axil bridge; Use axil interface for peripherals. Move bootrom to address 0x40000000. by @arturum1 in #946
  • Add needed suffixes to accomodate new Py2HWSW syntax by @agrevin in #951
  • Move iob_soc to lib and rename it to iob_system; Replace axil peripheral cbus by iob interface. by @arturum1 in #953
  • Pass iob_soc attributes via python parameters to iob_system parent. by @arturum1 in #955
  • Add SPDX license headers; Refactor iob_soc; Remove unneeded original_name and name attributes; Fix append of lists from iob_system child cores. by @arturum1 in #956
  • Move lib modules to py2hwsw repo; Fix git clone of py2hwsw submodules; Add ci.yml test to check compliance with REUSE Specification. by @arturum1 in #958
  • Improve default.nix to import the one from py2hwsw by @arturum1 in #959
  • Update py2 version; Add README.md. by @arturum1 in #962
  • Merge branch 'main' of IObundle/iob-soc into if_gen2; Update py2hwsw version. by @arturum1 in #967
  • Update py2hwsw version by @arturum1 in #968
  • Update py2hwsw version by @arturum1 in #971
  • Merge branch 'main' of github.com:IObundle/iob-soc into if_gen2 by @arturum1 in #973
  • If gen2 by @jjts in #974
  • Update README; Rename PY2HWSW_PATH to PY2HWSW_ROOT. by @arturum1 in #975
  • Update py2hwsw version by @arturum1 in #976
  • fix(README): add image assets by @P-Miranda in #978
  • Update default.nix, py2hwsw version, license headers. Update iob-soc to support new Tester. by @arturum1 in #979
  • Update py2hwsw; Update peripheral attributes. by @arturum1 in #981
  • Resolve issues. by @arturum1 in #984
  • Update iob-soc with latest version of py2hwsw by @arturum1 in #993
  • Update iob_soc according to new py2hwsw version by @arturum1 in #1003
  • feat(cpu): Add explicit cpu selection python parameter in iob_soc.py by @arturum1 in #1005
  • Update iob-soc with latest py2hwsw by @arturum1 in #1010
  • feat(gh): release artifacts by @P-Miranda in #1015

New Contributors

Full Changelog: V0.82...V0.83

Contributors

jjts, arturum1, and 4 other contributors
Assets 6
Loading
0