WIP: Cheaper threadfence #1765
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WIP: Cheaper threadfence #1765
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Better comment Make asm volatile to avoid reordering by compiler
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Details
Do not mention proprietary info or link to internal work items in this PR.
Work item: "Internal", or link to GitHub issue (if applicable).
What were the changes?
Gets rid of the cache invalidate instruction that would be part of __threadfence (device scope). Speeds up small sizes. I want to run CI tests on it see if it's safe.
Why were the changes made?
Speed
How was the outcome achieved?
See above
Additional Documentation:
In progress, ignore for now. Just noodling on this.
Approval Checklist
Do not approve until these items are satisfied.