ucas-ca-lab

bench of div and mul has been released in branch exp10_pipeline

to test the div module or mul module, use test_<module_name>.v as simulation and <module_name>.v as design
div_0_gen is signed and div_1_gen is unsigned
mul_test do signed mul, replace

assign tempans = $signed(extended_x) * $signed(extended_y) ;

with your module.

search IP catalog: Block Memory Generator

Name		Name	Last commit message	Last commit date
Latest commit History 48 Commits
exp_10_mul&div/mycpu_env/myCPU		exp_10_mul&div/mycpu_env/myCPU
exp_11_branch_mem/myCPU		exp_11_branch_mem/myCPU
exp_12_syscall/myCPU		exp_12_syscall/myCPU
exp_13_syscall_pro/myCPU		exp_13_syscall_pro/myCPU
exp_14_sram/myCPU		exp_14_sram/myCPU
exp_15_axi/myCPU		exp_15_axi/myCPU
exp_16_axi_rand_delay		exp_16_axi_rand_delay
exp_17_standalone_tlb/myCPU		exp_17_standalone_tlb/myCPU
exp_18_cpu_with_tlb		exp_18_cpu_with_tlb
exp_19_tlb_exc		exp_19_tlb_exc
exp_20_standalone_cache/myCPU		exp_20_standalone_cache/myCPU
exp_21_icache		exp_21_icache
exp_5_minicpu_env/miniCPU		exp_5_minicpu_env/miniCPU
exp_6_mycpu_env/myCPU		exp_6_mycpu_env/myCPU
exp_7_simple_pipeline/mycpu_env/myCPU		exp_7_simple_pipeline/mycpu_env/myCPU
exp_8_simple_pipeline_block/mycpu_env/myCPU		exp_8_simple_pipeline_block/mycpu_env/myCPU
exp_9_simple_pipeline_forward/mycpu_env/myCPU		exp_9_simple_pipeline_forward/mycpu_env/myCPU
img		img
LICENSE		LICENSE
README.md		README.md