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explain-assignee Public
Explain bug report assignee with the Pyexplainer tool
Python UpdatedAug 17, 2022 -
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ibex Public
Forked from lowRISC/ibexIbex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
SystemVerilog Apache License 2.0 UpdatedDec 8, 2020 -
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HacktoberFest2020 Public
Forked from shivangdubey/HacktoberFest2020Repository to let enthusiasts create issues and pull requests for the Open Source event
Python UpdatedOct 6, 2020 -
block-lpddr4_ctrl-samsung Public
Forked from saurabhsingh-pvips/block-lpddr4_ctrl-samsungdebug only
Scala Apache License 2.0 UpdatedJan 21, 2020 -
Project-Zipline Public
Forked from opencomputeproject/Project-ZiplineDefines a lossless compressed data format that is independent of CPU type, operating system, file system, and character set, and is suitable for compression using the XP10 algorithm.
Verilog Other UpdatedDec 12, 2019 -
block-pio-sifive Public
Forked from sifive/block-pio-sifiveAn example of on-boarding a PIO block in with duh and wake
Scala Apache License 2.0 UpdatedNov 21, 2019 -
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pythonic_ocr Public
Forked from greydanus/pythonic_ocrA convolutional neural network implemented in pure numpy.
Python UpdatedAug 21, 2017
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