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Starred repositories
Post-Quantum Cryptography IP Core (Crystals-Dilithium)
Caliptra IP and firmware for integrated Root of Trust block
The next generation of OpenLane, rewritten from scratch with a modular architecture
Protocol Buffers - Google's data interchange format
Macro Placement - benchmarks, evaluators, and reproducible results from leading methods in open source
The official PyTorch implementation of Google's Gemma models
4 stage, in-order, secure RISC-V core based on the CV32E40P
Generic Register Interface (contains various adapters)
RISC-V eXtension interface that provides a generalized framework suitable to implement custom coprocessors and ISA extensions
Sample code and notebooks for Generative AI on Google Cloud, with Gemini on Vertex AI
SystemVerilog parser library fully compliant with IEEE 1800-2017
This is the CORE-V MCU project, hosting CORE-V's embedded-class cores.
Chisel: A Modern Hardware Design Language
An open-source static random access memory (SRAM) compiler.
DRiLLS: Deep Reinforcement Learning for Logic Synthesis Optimization (ASPDAC'20)
HW Design Collateral for Caliptra RoT IP
🧑🏫 60+ Implementations/tutorials of deep learning papers with side-by-side notes 📝; including transformers (original, xl, switch, feedback, vit, ...), optimizers (adam, adabelief, sophia, ...), ga…
PDK for GlobalFoundries' 180nm MCU bulk process technology (GF180MCU).
7 track standard cells for GF180MCU provided by GlobalFoundries.
mflowgen -- A Modular ASIC/FPGA Flow Generator
OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/
12 weeks, 26 lessons, 52 quizzes, classic Machine Learning for all