save.jsoncontains the save fornandgame
- Only returns Negative (
0) if both signals (AND) are positive
| Input A | Input B | Output |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
- Note: The "spinny magnetic field" is indeed a magnetic field that attracts when powered
| Input | Output |
|---|---|
| 0 | 1 |
| 1 | 0 |
- Only returns Positive (
1) if both signals (AND) are positive
| Input A | Input B | Output |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
- Returns Positive (
1) if either signals (OR) are positive
| Input A | Input B | Output |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 1 |
- We invert the inputs into
NAND
- Returns Positive (
1) when the inputs are different
| Input A | Input B | Output |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
- Sort of a "both gates must agree" to pass
- Adds
21-bitnumbers
| A | B | Sum (High) | Sum (Low) |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 1 | 1 | 0 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 1 |
- Adds
31-bitnumbers into a2-bitvalue
| A | B | C_in | Sum (S) | Carry-out (C_out) |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 0 | 1 | 0 |
| 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 | 0 |
| 1 | 0 | 1 | 0 | 1 |
| 1 | 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 1 | 1 |
- Adding the
1-bitnumbers together (usingadd) and handling the high-bit seperartely- will *trigger the output high-bit* either when either addition results in the addition high-bit being triggered.
- Adds 2
2-bitnumbers and 11-bitcarry to form a3-bitnumber
- Combine the
1-bits to form a2-bitnumber - We now have 3
2-bitsand 11-bit(connect the1-bittos0)- Sum the
2-bitsand treat the output as a3-bitand2-bitoutput
- Sum the
- Add
1to a16-bit Number
- Simply use the carry-bit (
1)
16-bit Unsigned Integerrange:0 <= x <= 6553616-bit Signed Integerrange:-32767 <= x <= 32767(because it uses half for the negative-signs)- In Decimal:
- Negative Numbers are represented as
65536 - Overflow - E.g 65536 - 65535 = 1 - represents
-1
- Negative Numbers are represented as
- In Binary:
1111111111111110(ifMSB==1, it is a-venumber)
- Note: We need to add
1due to how the 2-complement inverting works:- When inverting
1111111111111110, we get0000000000000001 - Afterwards, we add
1and get0000000000000010(2)- This is part of a "Zero Balance"
- Taking into account the sign (
1), it is a-veand we get-2 -
$\therefore$ We need to "balance it out" by adding1afterwards
- When inverting
- Output
1only if all inputs are0
- (is this even optimal?)
- Output
1if the MSB (15th-bit) is1(indicates-veas noted in8.)
- The
s(Select) bit selects which input to select.- If
s==0, selectd0, ifs==1, selectd1
- If
| S | D0 | D1 | Out |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 0 |
| 0 | 1 | 0 | 1 |
| 0 | 1 | 1 | 1 |
| 1 | 0 | 0 | 0 |
| 1 | 0 | 1 | 1 |
| 1 | 1 | 0 | 0 |
| 1 | 1 | 1 | 1 |
- Use 2
ANDto conditionally select, but invert thes==0
- The
s(Switch) bit selects which output to output to.- If
s==0, output toc0, ifs==1, output toc1
- If
| S | In | D0 | D1 |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 1 | 1 | 0 | 1 | 0 | 0 | 0 |
| 1 | 1 | 0 | 1 |
- Select between 4 Logic Operations depending on
op0andop1
| op1 | op0 | Operation |
|---|---|---|
| 0 | 0 | X AND Y |
| 0 | 1 | X OR Y |
| 1 | 0 | X XOR Y |
| 1 | 1 | Invert X |
- (optimal is 7 components, but this uses 8)
- Select between 4 Arithmetic Operations depending on
op0andop1
| op1 | op0 | Operation |
|---|---|---|
| 0 | 0 | X + Y |
| 1 | 0 | X - Y |
| 0 | 1 | X + 1 |
| 1 | 1 | X - 1 |
- Select between 9 Arithmetic Operations depending on
op0,op1andu - Also provides 2 additional flags:
- When
swflag is1,XandYare swapped - When
zxflag is1, left operand is set to0
- When
| u | op1 | op0 | Operation |
|---|---|---|---|
| 0 | 0 | 0 | X AND Y |
| 0 | 0 | 1 | X OR Y |
| 0 | 1 | 0 | X XOR Y |
| 0 | 1 | 1 | Invert X |
| 1 | 0 | 0 | X + Y |
| 1 | 1 | 0 | X - Y |
| 1 | 0 | 1 | X + 1 |
| 1 | 1 | 1 | X - 1 |
| zx | sw | Effective Operation |
|---|---|---|
| 0 | 0 | X - Y |
| 0 | 1 | Y - X |
| 1 | 0 | 0 - Y |
| 1 | 1 | 0 - X |
- Given 3 flags below which each represent a condition:
| Flag | Condition |
|---|---|
| lt | Less than zero |
| eq | Equal to zero |
| gt | Greater than zero |
- We want to output when 1:
| lt | eq | gt | Output 1 When |
|---|---|---|---|
| 0 | 0 | 0 | Never |
| 0 | 0 | 1 | X > 0 |
| 0 | 1 | 0 | X = 0 |
| 0 | 1 | 1 | X ≥ 0 |
| 1 | 0 | 0 | X < 0 |
| 1 | 0 | 1 | X ≠ 0 |
| 1 | 1 | 0 | X ≤ 0 |
| 1 | 1 | 1 | Always |
-
s=1(set) sets output to1 -
r=1(reset) sets output to0 -
When both
s=1,r=1, the output takes the Previous Output
| s | r | Output |
|---|---|---|
| 1 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 1 | Previous output |
| 0 | 0 | Not used |
- Behaviour when we activate
rthens(output is0)- When
ris activated,Left-Nandb=1is set which causesLeft-Nandto output0and setRight-Nanda=0 - When
sis activated, it setsRight-Nandb=1. But this is not enough to change anything sinceRight-Nand'sa=0already
- When
- Behaviour when we activate
sthenr(output is1)- When
sis activated,Right-Nandb=1is set which causesRight-Nandto output0and setLeft-Nand'sa=0 - When
ris activated, it setsLeft-Nand'sb=1. But this is not enough to change anything sinceLeft-Nand'sa=0already.
- When