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Datasets and code for the paper entitled "A Multi-Channel Software Decoder for the LoRa Modulation Scheme".
GNU Radio blocks for receiving LoRa modulated radio messages using SDR
DSP with FPGAs 3. edition ISBN: 978-3-540-72612-8
2014 Book matter Digital Signal Processing WithFie
Must-have verilog systemverilog modules
A project on hardware design for convolutional neural network. This neural network is of 2 layers with 400 inputs in the first layer. This layer takes input from a memory. A MATLAB script was creat…
CNN acceleration on virtex-7 FPGA with verilog HDL
A convolutional neural network implemented in hardware (verilog)
Quantized Neural Networks (QNNs) on PYNQ
RTL Verilog library for various DSP modules
This small project implementation uses FPGA (Development Board Model: AC606) and high-speed ADC module to achieve multi-channel ADC data sampling and output data using parallel port. I will then up…