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vivado-risc-v Public
Forked from eugene-tarassov/vivado-risc-vXilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro
Tcl Other UpdatedApr 24, 2025 -
cv32e40x-soc Public
Forked from AI-Vector-Accelerator/cv32e40x-socSystemVerilog ISC License UpdatedJan 24, 2022 -
cv32e40x-soc-2 Public
Forked from michael-platzer/cv32e40x-socMinimal SoC for simulating CV32E40X
SystemVerilog ISC License UpdatedNov 24, 2021 -
cv32e40p Public
Forked from flip1995/cv32e40pCV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform
SystemVerilog Other UpdatedMar 2, 2021 -
VHDL 2008/93/87 simulator
VHDL GNU General Public License v2.0 UpdatedFeb 20, 2021 -
riscv-dv Public
Forked from chipsalliance/riscv-dvSV/UVM based instruction generator for RISC-V processor verification
SystemVerilog Apache License 2.0 UpdatedSep 8, 2020 -
myhdl Public
Forked from myhdl/myhdlThe MyHDL development repository
Python GNU Lesser General Public License v2.1 UpdatedJul 26, 2020 -
Ripes Public
Forked from mortbopet/RipesA graphical processor simulator and assembly editor for the RISC-V ISA
C++ MIT License UpdatedMay 19, 2020 -
edalize Public
Forked from olofk/edalizeAn abstraction library for interfacing EDA tools
Python BSD 2-Clause "Simplified" License UpdatedMay 4, 2020 -
hdl4fpga Public
Forked from hdl4fpga/hdl4fpgaVHDL library 4 FPGAs
VHDL GNU Lesser General Public License v3.0 UpdatedMay 3, 2020 -
RapidWright Public
Forked from Xilinx/RapidWrightBuild Customized FPGA Implementations for Vivado
Java Other UpdatedMay 2, 2020 -
icestudio Public
Forked from FPGAwars/icestudio❄️ Visual editor for open FPGA boards
JavaScript GNU General Public License v2.0 UpdatedApr 26, 2020 -
drawio-desktop Public
Forked from jgraph/drawio-desktopOfficial electron build of diagrams.net
JavaScript Apache License 2.0 UpdatedApr 22, 2020 -
covid19_inference_forecast Public
Forked from Priesemann-Group/covid19_inference_forecast -
C4-PlantUML Public
Forked from plantuml-stdlib/C4-PlantUMLC4-PlantUML combines the benefits of PlantUML and the C4 model for providing a simple way of describing and communicate software architectures
MIT License UpdatedApr 1, 2020 -
riscv-ovpsim Public
Forked from byungwoo733/riscv-ovpsimOVP Simulator for RISC-V
C Other UpdatedMar 31, 2020 -
ppk-nrf91 Public
Forked from IRNAS/ppk-nrf91How to use Nordic Power profiling kit with nRF91 DK
UpdatedJan 26, 2020 -
Android-ImageMagick7 Public
Forked from MolotovCherry/Android-ImageMagick7Fully featured, latest builds of imagemagick 7 (7.0.9-17) for Android. Featuring a full build of very many libraries (delegates)
C UpdatedJan 19, 2020 -
e2 6CAC 00_opensource Public
Forked from SI-RISCV/e200_opensourceThe Ultra-Low Power RISC Core
Verilog Apache License 2.0 UpdatedJan 2, 2020 -
RISCV_CPU Public
Forked from Michaelvll/RISCV_CPUA FPGA supported RISC-V CPU with 5-stage pipeline implemented in Verilog HDL
C MIT License UpdatedDec 5, 2019 -
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FPGA-peripherals Public
Forked from FPGAwars/FPGA-peripherals🌱 ❄️ Collection of open-source peripherals in Verilog
Verilog GNU General Public License v2.0 UpdatedOct 24, 2019 -
aib-phy-hardware Public
Forked from intel/aib-phy-hardwareVerilog Apache License 2.0 UpdatedMay 13, 2019 -
dpll Public
Forked from ZipCPU/dpllA collection of phase locked loop (PLL) related projects
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linux-nvme Public
Forked from damige/linux-nvmeNVME patches for (ARCH) linux
Shell UpdatedMay 6, 2017
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