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serv Public
Forked from olofk/servSERV - The SErial RISC-V CPU
Verilog ISC License UpdatedMar 18, 2025 -
VerilogBoy Public
Forked from zephray/VerilogBoyA Pi emulating a GameBoy sounds cheap. What about an FPGA?
Verilog Other UpdatedMar 16, 2025 -
zipcpu Public
Forked from ZipCPU/zipcpuA small, light weight, RISC CPU soft core
Verilog UpdatedMar 16, 2025 -
darkriscv Public
Forked from darklife/darkriscvopensouce RISC-V cpu core implemented in Verilog from scratch in one night!
Verilog BSD 3-Clause "New" or "Revised" License UpdatedMar 15, 2025 -
chisel-testers2 Public
Forked from ucb-bar/chiseltestRepository for chisel3 testers2 open alpha
Scala UpdatedJul 12, 2024 -
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OpenROAD-flow-scripts Public
Forked from The-OpenROAD-Project/OpenROAD-flow-scriptsSourcePawn Other UpdatedMay 28, 2024 -
RISC-V-Processor-with-Pipelining Public
Forked from EngAhmed21/RISC-V-Processor-with-PipeliningImplementation of the pipelined RISC V processor with many useful features as fully bypassing, dynamic branch prediction, single and multi cycle instructions, ALU unit works in parallel with a mult…
Verilog UpdatedFeb 12, 2024 -
siliconcompiler Public
Forked from siliconcompiler/siliconcompilerA modular build system for hardware
Python Apache License 2.0 UpdatedDec 20, 2022 -
OpenROAD Public
Forked from The-OpenROAD-Project/OpenROADOpenROAD's unified application implementing an RTL-to-GDS Flow
Verilog BSD 3-Clause "New" or "Revised" License UpdatedNov 18, 2022 -
esbonio Public
Forked from swyddfa/esbonioA language server and VSCode extension for working with Sphinx projects.
Python UpdatedFeb 27, 2022 -
OpenLane Public
Forked from The-OpenROAD-Project/OpenLaneOpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen, Fault and custom methodology scripts for design exploration and optimization.
Verilog Apache License 2.0 UpdatedOct 22, 2021 -
docs Public
Forked from vscode-restructuredtext/docsrestructuredtext.net contents
Python Other UpdatedSep 2, 2021 -
mergify-engine Public
Forked from Mergifyio/mergifyEngine for Mergify
Python Apache License 2.0 UpdatedJun 12, 2021 -
guacamole-server Public
Forked from apache/guacamole-serverMirror of Apache Guacamole Server
C Apache License 2.0 UpdatedJun 3, 2021 -
snooty-parser Public
Forked from mongodb/snooty-parserPython Apache License 2.0 UpdatedJan 28, 2021 -
alpha-release Public
Forked from The-OpenROAD-Project/alpha-releaseBuilds, flow and designs for the alpha release
Verilog UpdatedDec 31, 2020 -
bootstrap-datepicker Public
Forked from uxsolutions/bootstrap-datepickerA datepicker for twitter bootstrap (@twbs)
JavaScript Apache License 2.0 UpdatedOct 17, 2020 -
OpenROAD-flow Public
Forked from tunghoang290780/OpenROAD-flowOpenROAD's top level repo pointing to stable binaries, code, sample designs and an example flow
Makefile Other UpdatedMay 6, 2020 -
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verilog-vcd-parser Public
Forked from ben-marshall/verilog-vcd-parserA parser for Value Change Dump (VCD) files as specified in the IEEE System Verilog 1800-2012 standard.
C++ MIT License UpdatedSep 23, 2019 -
chisel-book Public
Forked from schoeberl/chisel-bookDigital Design with Chisel
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chisel-testers Public
Forked from freechipsproject/chisel-testersProvides various testers for chisel users
Scala UpdatedFeb 27, 2017 -
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jenkins Public
Forked from jenkinsci/jenkinsJenkins Continuous Integration Server
Java MIT License UpdatedDec 3, 2014 -
sphinxcontrib-gtkwave Public
Forked from ponty/sphinxcontrib-gtkwaveSphinx extension to include VCD (value change dump) files using GTKWave
Python BSD 2-Clause "Simplified" License UpdatedJan 7, 2014 -
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