[BUG] Wrong permission check walking HGATP #2910
Labels
notCV32A65X
It is not an CV32A65X issue
Status:Stale
Issue or PR is stale and hasn't received any updates.
When a store instruction in executed on VM mode (V=1), HGATP walks for non-leaf nodes should only be checked for readability (P, R, A bits).
I think this line lacks
&& (ptw_stage_q != G_INTERMED_STAGE)
to do so, but I am not an expert in SystemVerilog.cva6/core/cva6_mmu/cva6_ptw.sv
Line 475 in b9da1d9
I am a system developer porting virtualization modules on the CVA6, and notice virtual guest store page fault with translation error during walk when the VSATP nodes are read-only in HGATP, hence my supposition.
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