8000 [feat] extend MemoryAddr trait, add pageiter for huge pages by hky1999 · Pull Request #7 · arceos-org/axmm_crates · GitHub
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[feat] extend MemoryAddr trait, add pageiter for huge pages #7

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8 changes: 7 additions & 1 deletion memory_addr/src/addr.rs
Original file line number Diff line number Diff line change
@@ -1,4 +1,6 @@
use core::cmp::Ord;
use core::fmt::{Debug, LowerHex};
use core::marker::{Send, Sync};

/// A trait for memory address types.
///
Expand All @@ -17,6 +19,7 @@ pub trait MemoryAddr:
+ Into<usize>
// The address type should be comparable.
+ Ord
+ Send + Sync + Debug + LowerHex
{
// No required methods for now. Following are some utility methods.

Expand Down Expand Up @@ -260,7 +263,10 @@ pub trait MemoryAddr:

/// Implement the `MemoryAddr` trait for any type that is `Copy`, `From<usize>`,
/// `Into<usize>`, and `Ord`.
impl<T> MemoryAddr for T where T: Copy + From<usize> + Into<usize> + Ord {}
impl<T> MemoryAddr for T where
T: Copy + From<usize> + Into<usize> + Ord + Send + Sync + Debug + LowerHex
{
}

/// Creates a new address type by wrapping an `usize`.
///
Expand Down
12 changes: 12 additions & 0 deletions memory_addr/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -12,9 +12,21 @@ pub use self::range::{AddrRange, PhysAddrRange, VirtAddrRange};
/// The size of a 4K page (4096 bytes).
pub const PAGE_SIZE_4K: usize = 0x1000;

/// The size of a 2M page (2097152 bytes).
pub const PAGE_SIZE_2M: usize = 0x200000;

/// The size of a 1G page (1073741824 bytes).
pub const PAGE_SIZE_1G: usize = 0x40000000;

/// A [`PageIter`] for 4K pages.
pub type PageIter4K<A> = PageIter<PAGE_SIZE_4K, A>;

/// A [`PageIter`] for 2M pages.
pub type PageIter2M<A> = PageIter<PAGE_SIZE_2M, A>;

/// A [`PageIter`] for 1G pages.
pub type PageIter1G<A> = PageIter<PAGE_SIZE_1G, A>;

/// Align address downwards.
///
/// Returns the greatest `x` with alignment `align` so that `x <= addr`.
Expand Down
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