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2021_r1

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util_do_ram: Fix Rx path for interrupted transfers

When capture length is not programmed the DMA will interrupt the
transfer once it received all the samples he was set in its descriptor,
this case must be handled by resetting the read process and returning
an end of transfer (eot) to the data offload control logic.

2019_r2

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pluto: Fix dunf connection

usdrx1_legacy

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USDRX1 ulstrasound hdl reference design

legacy_fmcomms7

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FMCOMMS7 hdl reference design

legacy_fmcjesdadc1_zcu102

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FMCJESDADC1 hdl reference design for ZCU102 carrier

legacy_fmcjesdadc1_a10soc

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FMCJESDADC1 hdl reference design for A10SOC carrier

axi_dmac_sg

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Paul's attempt to add scatter-gather support for ADI AXI_DMAC IP

2019_r1

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hdl_2019_r1 release tag

2018_r2

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Tag for the hdl_2018_r2 release

legacy_ad9208_2019_r1

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