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Starred repositories

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ANTLR (ANother Tool for Language Recognition) is a powerful parser generator for reading, processing, executing, or translating structured text or binary files.

Java 17,947 3,354 Updated Apr 3, 2025

A completely open source implementation of a Bitcoin Miner for Altera and Xilinx FPGAs. This project hopes to promote the free and open development of FPGA based mining solutions and secure the fut…

VHDL 1,330 553 Updated May 16, 2022
Makefile 26 4 Updated Oct 23, 2017

A standalone parser for BSV (Bluespec SystemVerilog) written in Go

Go 13 5 Updated Dec 20, 2016

A library to help you create pipelines in Golang

Go 220 13 Updated Jan 24, 2024

Bluespec SystemVerilog Package for Sublime Text

8 3 Updated Sep 15, 2015
Verilog 24 13 Updated Feb 26, 2024

Official repository of the AWS EC2 FPGA Hardware and Software Development Kit

VHDL 1,565 521 Updated Apr 24, 2025

Xilinx Tcl Store

Tcl 358 191 Updated May 19, 2025

Digital timing diagram editor

JavaScript 1,000 166 Updated Jan 29, 2025

Main page

Emacs Lisp 126 22 Updated Feb 12, 2020

PCIe library for the Xilinx 7 series FPGAs in the Bluespec language

Bluespec 78 23 Updated Mar 22, 2022
Shell 5 2 Updated Nov 9, 2018

RISC-V CPU, simple 5-stage in-order pipeline, for low-end applications needing MMUs and some performance

Bluespec 366 57 Updated Oct 19, 2023

RISC-V CPU, simple 3-stage pipeline, for low-end applications (e.g., embedded, IoT)

Verilog 323 51 Updated Jan 23, 2022

A formal spec of the RISC-V Instruction Set Architecture, written in Bluespec BSV (executable, synthesizable)

Bluespec 20 4 Updated Sep 15, 2017

Semi-automatically generated 3D printable cases for development boards using OpenSCAD

OpenSCAD 184 22 Updated Mar 27, 2020

A directory of Western Digital’s RISC-V SweRV Cores

SystemVerilog 865 132 Updated Mar 26, 2020
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