Stars
AXI, AXI stream, Ethernet, and PCIe components in System Verilog
Verilog AXI components for FPGA implementation
Verilog Ethernet components for FPGA implementation
EPICS Archiver Appliance Configuration Environment for ALS/ALS-U at LBNL
Kalman Filter book using Jupyter Notebook. Focuses on building intuition and experience, not formal proofs. Includes Kalman filters,extended Kalman filters, unscented Kalman filters, particle filte…
The C/C++ core of the EPICS Base control system toolkit
Verilog AXI stream components for FPGA implementation
Client-side proxy service for connecting a workstation to CBorg API Services
Xilinx virtual cable server for generic FTDI 4232H.
Scalable datastore for metrics, events, and real-time analytics
duqiang / RFSoC-PYNQ
Forked from Xilinx/RFSoC-PYNQPython productivity for RFSoC platforms
Verilator open-source SystemVerilog simulator and lint system
A PYNQ overlay demonstrating AMD RFSoC Multi-Tile Synchronization (MTS).
Alternative firmware for the Si5xx-PROG_EVB clock synthesizer evaluation board
PyTorch version of Stable Baselines, reliable implementations of reinforcement learning algorithms.
Open deep learning compiler stack for cpu, gpu and specialized accelerators
Open source platform for the machine learning lifecycle
A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.