Stars
GRIN is a compiler back-end for lazy and strict functional languages with whole program optimization support.
Flexible Intermediate Representation for RTL
OpenTitan: Open source silicon root of trust
Chisel: A Modern Hardware Design Language
ESI is an FPGA connectivity system. It uses typed, latency-insensitive on-chip connections between ESI-enabled modules. It also bridges off-chip and creates high-level APIs using the type data.
The batteries-included testing and formal verification library for Chisel-based RTL designs.
UCLID5: formal modeling, verification, and synthesis of computational systems
A lightweight WebAssembly runtime that is fast, secure, and standards-compliant
IVy is a research tool intended to allow interactive development of protocols and their proofs of correctness and to provide a platform for developing and experimenting with automated proof techniq…