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logisim-evolution/logisim-evolution
logisim-evolution/logisim-evolution PublicDigital logic design tool and simulator
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veripython
veripython Public本科编译原理大作业:Verilog to Python Testbench Module:生成 FIRRTL 中间表示的 Verilog 文法子集的前端与基于 Arcilator 生成 Python 仿真模块的后端
C++ 12
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openRouteFinder
openRouteFinder PublicThis open source project is there to provide portable services (that can be implemented to web or embedded devices) for computations and plannings of the airway route in flight simulation platforms.
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