8000 gatecat (myrtle) / Starred · GitHub
[go: up one dir, main page]
More Web Proxy on the site http://driver.im/
Skip to content
View gatecat's full-sized avatar
🦈
shark soft
🦈
shark soft

Organizations

@YosysHQ

Block or report gatecat

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse
Showing results

Server managing SAMs to create VDV KA STB tickets as aztec codes

Java 8 4 Updated Nov 15, 2022

A Yosys pass and technology library + scripts for implementing a HDL design in discretie FETs for layout in KiCad

C++ 12 Updated Jan 15, 2024

RFCs for changes to the Amaranth language and standard components

Python 18 12 Updated Jun 27, 2025

Kactus2 is a graphical EDA tool based on the IP-XACT standard.

C++ 218 39 Updated Jul 10, 2025

lazy notes about the musicstore hdd format/firmware image

Python 3 Updated Dec 13, 2022

An Open-Source Silicon Compiler for Reduced-Complexity Reconfigurable Fabrics

SourcePawn 11 1 Updated Jul 10, 2025

TinyTapeout-02 submission repository

Verilog 28 3 Updated Mar 27, 2024

Minimax: a Compressed-First, Microcoded RISC-V CPU

Verilog 219 13 Updated Apr 21, 2024

A steam era route for Open Rails Train Simulator. Features the Bournemouth UK line timetable

Assembly 13 5 Updated Feb 8, 2025

BLÅHAJ Soft toy, shark mod, 16px

Java 173 36 Updated Jul 15, 2024

PDK for GlobalFoundries' 180nm MCU bulk process technology (GF180MCU).

Makefile 402 59 Updated May 31, 2023

a rust terminal-based clone of the cell tower puzzle game

Rust 5 Updated May 21, 2022

a (WIP) paw-shaped pogo pin connector

58 Updated Mar 2, 2022
Verilog 6 4 Updated Aug 17, 2022
C 6 2 Updated Jun 29, 2024

SoC and build scripts for MPW4

Python 5 1 Updated Jan 30, 2022
Verilog 6 Updated May 17, 2023

Gateware / Firmware / BuildRoot to run linux on iCE40 / iCEBreaker

Verilog 100 12 Updated Feb 17, 2023

Wavious DDR (WDDR) Physical interface (PHY) Hardware

SystemVerilog 105 40 Updated Jul 22, 2021

A simple, yet flexible document management system

Rust 2 Updated Jul 3, 2021

Python interface to FPGA interchange format

Python 41 13 Updated Oct 19, 2022

A collection of my KiCad libraries

2 Updated Jun 15, 2025

Set up your GitHub Actions workflow with a OSS CAD Suite

TypeScript 16 2 Updated Mar 21, 2024

🏳️‍🌈 Like cat but more colorful! ✨

C++ 276 15 Updated Jul 31, 2024

converts catgirls to gds files

Python 15 Updated May 24, 2021

HBM2 integration test on FK33 with LiteX

Python 9 4 Updated Jun 15, 2021

Bulk scrape and download datasheets from various vendors (insult)

Python 14 1 Updated Aug 10, 2021

Primary GIT Repository for the Zephyr Project

C 10 6 Updated Jul 8, 2025

Antmicro's open hardware 3G SDI into MIPI CSI-2 converter

58 21 Updated Apr 4, 2024

Very simple logic fitter for ATF15xx CPLDs. Doesn't support much!

Python 5 Updated Feb 28, 2021
0