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SDRAM controller with AXI4 interface

C++ 94 31 Updated Aug 8, 2019

🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

VHDL 1,802 270 Updated Jul 11, 2025

Windows inside a Docker container.

Shell 36,404 2,687 Updated Jul 7, 2025

https://caravel-user-project.readthedocs.io

Verilog 6 Updated Mar 24, 2022

Conv-TasNet: Surpassing Ideal Time-Frequency Magnitude Masking for Speech Separation Pytorch's Implement

Python 487 77 Updated May 26, 2023

raspberry pi pico dma uart example

C++ 8 4 Updated Jun 20, 2025
Dockerfile 95 40 Updated Jan 27, 2025

Open source Zynq timestamping implementation from Software Radio Systems (SRS)

VHDL 71 17 Updated Jan 11, 2023

bladeRF-wiphy is an open-source IEEE 802.11 compatible software defined radio VHDL modem

VHDL 425 51 Updated Apr 15, 2024

GNSS-SDR, an open-source software-defined GNSS receiver

C++ 1,838 652 Updated Jul 11, 2025
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