Lists (4)
Starred repositories
wellen: waveform datastructures in Rust. Fast VCD, FST and GHW parsing for waveform viewers.
Automatically crawl arXiv papers daily and summarize them using AI. Illustrating them using GitHub Pages.
This is the source code of our submission "Bridging the Gap between Hardware Fuzzing and Industrial Verification" for GLSVLSI 2025.
108F9
microsoft / PowerToys
Windows system utilities to maximize productivity
A Linux-capable RISC-V multicore for and by the world
Tracking RISC-V Actions on Education, Training, Courses, Monitorships, etc.
FreeRDP is a free remote desktop protocol library and clients
LLM Evaluation Benchmark on Hardware Formal Verification
Reasoning LLMs optimized for Chisel code generation
A template project for beginning new Chisel work
wyanzhao / boom-fpga-zynq
Forked from riscv-boom/fpga-zynqSupport for Rocket Chip on Zynq FPGAs
POC code on side channel attack, including spectre attack and meltdown; verified on the BOOMv3 (smallBoomconfig)
SCAAML: Side Channel Attacks Assisted with Machine Learning
A curated list of awesome side-channel attack resources
Switch and track your input sources with ease ✨
AutoSVA is a tool to automatically generate formal testbenches for unit-level RTL verification. The goal is to, based on annotations made in the signal declaration section of an RTL module, generat…
RISC-V Formal Verification Framework
Automated Repair of Verilog Hardware Descriptions
Generating Hardware Verification Assertions from Design Specifications via Multi-LLMs