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Some experiments I did with the Raspberry Pi Pico
Hardware Description Language (Verilog, VHDL, Chisel, nMigen, etc) with open tools (Yosys, Verilator, OpenROAD, etc) rules for Bazel (https://bazel.build)
A Turbo circuit with a MHz display that can slow down the CPU speed
Repurposing existing HDL tools to help writing better code
dian-lun-lin / RTLflow
Forked from verilator/verilatorA GPU acceleration flow for RTL simulation with batch stimulus
Optimized library for driving parallel eink displays with the ESP32
A port of Mbed-TLS for the Classic Macintosh OS 7/8/9
SDK sch&layout reference design and datasheet documention
🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
This repository contains high-resolution photos documenting the restoration of a 1979 Apple ][+, with serial number A2S2-522915.
This repository contains high-resolution photos documenting the restoration of a 1977 original Apple ][, with serial number A2S1-28243.
azonenberg / prjcombine
Forked from prjunnamed/prjcombineAn FPGA reverse engineering and documentation project
Hardware Description Language (Verilog, VHDL, Chisel, nMigen, etc) with open tools (Yosys, Verilator, OpenROAD, etc) rules for Bazel (https://bazel.build)
Fast realtime softare rendering library for C++14 using SSE/AVX/NEON. 2D, 3D and isometric rendering with minimal system dependencies.
A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.
SW and HW accelerated GPU driver for Windows 9x Virtual Machines
Easily manage your IoT device fleet with Edgehog at once. Get information on device status, deploy updates, geolocate your devices and much more!
Build a SDR SW/MW/LW Receiver with a Raspberry Pi Pico