Stars
FMC card to allow interfacing Xilinx FPGA boards with Jetson TX2 or TX1 via CSI-2 camera interface
verilog code to run a 16 bit video card
🔴 SystemVerilog FPGA cores to communicate with FTDI Synchronous/Asynchronous FIFOs (FT245 protocol)
Fast parser for Saleae Logic 2 binary export format (Digital only)
2D vector & raster editor that melds traditional layers & tools with a modern node-based, non-destructive, procedural workflow.
Python interface to Optotune focus-tunable lenses
SystemVerilog UVM testbench example
The High-Frequency Trading FPGA System is an ultra-low latency platform for electronic trading on FPGAs. It features a TCP/IP stack, order matching engine, custom IP core, and risk management modul…
I will be implementing the LC-3 ISA specifications in verilog.
A collection of hardware and software projects based around the Electro-Smith Daisy Seed
Ravi is a dialect of Lua, featuring limited optional static typing, JIT and AOT compilers
Euclidean drum machine maybe one day suitable for deploying onto ipad running pdparty
A reverb example for the terrarium from PedalPCB
An open source cross-platform USB stack for embedded system
Opensource, Skywater PDK, Digital design, OPENLANE, Analog design
BaseJump STL: A Standard Template Library for SystemVerilog
3D-printable hexagonal mirror array capable of reflecting sunlight into arbitrary patterns
Verilog Ethernet components for FPGA implementation
John's Field-Programmable JPEG Compressor; a jpeg compressor written in verilog. Currently targeted to deploy to Lattice's iCE40 up5k fpga.