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aman-goel / avr

Reads a state transition system and performs property checking

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lsils / mockturtle

C++ logic network library

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SystemVerilog compiler and language services

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An automatic clock gating utility

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Benchmarks for Yosys development

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openrisc / mor1kx

mor1kx - an OpenRISC 1000 processor IP core

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chipsalliance / rocket-chip

Rocket Chip Generator

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chili-chips-ba / wireguard-fpga

Full-throttle, wire-speed hardware implementation of Wireguard VPN, using low-cost Artix7 FPGA with opensource toolchain. If you seek security and privacy, nothing is private in our codebase. Our d…

VHDL 100 2 Updated Jun 2, 2025

schoeberl / wildcat

An implementation of RISC-V

Scala 33 8 Updated May 26, 2025
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