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@ChatDesignVerification
ChatDV ChatDesignVerification
LLM-driven Digital Hardware Design Verification Solution
@sqlmap3
han wang sqlmap3
vimer；Design Verification

other

@it-ebooks-0
计算机电子书 it-ebooks-0
@planvtech
PlanV planvtech
@AlSaqr-platform
AlSaqr-platform
@rggen
RgGen rggen
Code generation tool for control and status registers
@squared-studio
Squared Studio squared-studio
@olofk
Olof Kindgren olofk
@OpenXiangShan
XiangShan OpenXiangShan
Open-source high-performance RISC-V processor
@soDLA-publishment
soDLA-publishment
@angseung
IM SEUNGWOO angseung

Seoul

@Glenwing
Glenwing
@lazyparser
Wei Wu lazyparser

@plctlab

@bytedance
Bytedance Inc. bytedance

Singapore

@vesa-org
VESA vesa-org
Video Electronics Standards Association
@natanbc
Natan natanbc
Program received signal SIGSEGV (fault address 0x41414141)
@freecores
FreeCores freecores
A home for open source hardware cores
@agra-uni-bremen
agra-uni-bremen
@JulianKemmerer
Julian Kemmerer JulianKemmerer

Philadelphia, PA

@imphil
Philipp Wagner imphil

@fossi-foundation @IBM Augsburg, DE

@riscv-ovpsim
riscv-ovpsim
@LvNA-system
LvNA system LvNA-system
Labeled Architecture System
@PLC2
PLC2 GmbH PLC2
Programmable Logic Competence Center

Freiburg, Germany

@stnolting
stnolting
Roads? Where we're going we don't need roads. - "Doc" Emmett L. Brown

@fraunhofer-ims 🇪🇺 European Union

@mariusmm
Màrius Montón mariusmm

Barcelona

@riscv
RISC-V riscv
The Open-Standard Instruction Set Architecture

Zurich, CH

@riscv-verification
riscv-verification
@ksco
Yang Liu ksco

@plctlab Earth

@ISRC-CAS
Intelligent Software Research Center ISRC-CAS
Intelligent Software Research Center, Institute of Software, Chinese Academy of Sciences

Beijing

@plctlab
PLCT Lab plctlab
Compilers, Simulators, Runtimes

China

@gem5
gem5 gem5
@gem5-gpu
gem5-gpu gem5-gpu
gem5-gpu: A Heterogeneous CPU-GPU Simulator
@The-OpenROAD-Project
The OpenROAD Project The-OpenROAD-Project
OpenROAD seeks to develop and foster an autonomous, 24-hour, open-source layout generation flow (RTL-to-GDS).

United States of America

@jameslzhu
James Zhu jameslzhu
Currently working on embedded device boot security. Recovering Berkeley alum. Useless contributor to @compserv and @ocf.

@NVIDIA San Jose, CA

@Lampro-Mellon
Lampro Mellon Lampro-Mellon
Lampro Mellon imparts and disseminates skills to individuals so as to create expert design engineers ready for the international semiconductor chip market.

Lahore, Pakistan

@hlslibs
HLSLibs hlslibs
Open-Source High-Level Synthesis IP Libraries
@PolyArch
PolyArch PolyArch
PolyArch Research Group
@ZipCPU
Dan Gisselquist ZipCPU

Gisselquist Technology, LLC

@tudortimi
Tudor Timi tudortimi
Verification Engineer by day, Verification Gentleman by night.

Verification Gentleman

@hughperkins
Hugh Perkins hughperkins
@SymbioticEDA
Symbiotic EDA SymbioticEDA
Symbiotic EDA writes open source tools for digital circuit designers to make them more productive.

Vienna

@vortexgpgpu
Vortex OpenGPU vortexgpgpu
@antmicro
Antmicro antmicro
Antmicro is a software-driven tech company developing open and modern industrial edge and cloud AI systems.
@mramdas
Ramdas M mramdas
-Experienced Verification Engineer, Online teacher -Author of "Cracking Digital VLSI Verification Interview : Interview Success -Quora blogger

Verification Excellence Online

@mit-han-lab
MIT HAN Lab mit-han-lab
Efficient AI Computing. PI: Song Han

MIT

@bluespec
Bluespec, Inc. bluespec

Framingham, MA

@StanfordAHA
Stanford AHA! Agile Hardware Center StanfordAHA
Making hardware fun again

Stanford University

@T-head-Semi
T-Head Semiconductor Co., Ltd. T-head-Semi
@openasic-org
OpenASIC openasic-org
Open source hardware (IP) design

OpenASIC China

@Juniper
Juniper Networks Juniper
0