8000 [RV64_DYNAREC] Added movbe opcode by wannacu · Pull Request #926 · ptitSeb/box64 · GitHub
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[RV64_DYNAREC] Added movbe opcode #926

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Merged
merged 1 commit into from
Aug 7, 2023
Merged

[RV64_DYNAREC] Added movbe opcode #926

merged 1 commit into from
Aug 7, 2023

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wannacu
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@wannacu wannacu commented Aug 7, 2023

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@ptitSeb ptitSeb merged commit adaafc2 into ptitSeb:main Aug 7, 2023
@@ -128,6 +128,8 @@ f28–31 ft8–11 FP temporaries Caller
// RV32I
// put imm20 in the [31:12] bits of rd, zero [11:0] and sign extend bits31
#define LUI(rd, imm20) EMIT(U_type((imm20)<<12, rd, 0b0110111))

#define LI(rd, imm12) if (imm12 < 0x800) { ADDI(rd, xZR, imm12);} else {LUI(rd, 1); ADDIW(rd, rd, -(0x1000 - imm12));}
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This is redundant. FYI we have this macro, which correctly handles signed 32-bit immediate:

#define MOV32w(A, B) rv64_move32(dyn, ninst, A, B, 1)

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You're right, I got a mistake. The immediate value for the pseudo instruction 'li' should be 32 bits.

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@wannacu Can you submit another PR for these suggestions?

}
} else {
if (rex.w) {
LI(x2, 0xff);
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0xff fits in imm12, so ADDI(x2, xZr, 0xff) is enough.

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