8000 [DYNAREC][INTERPRETER] Rework on 6C/6D/6E/6F opcodes by ksco · Pull Request #1098 · ptitSeb/box64 · GitHub
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[DYNAREC][INTERPRETER] Rework on 6C/6D/6E/6F opcodes #1098

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Merged
merged 1 commit into from
Nov 28, 2023
Merged

[DYNAREC][INTERPRETER] Rework on 6C/6D/6E/6F opcodes #1098

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15 changes: 14 additions & 1 deletion src/dynarec/arm64/dynarec_arm64_00.c
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Original file line number Diff line number Diff line change
Expand Up @@ -817,8 +817,21 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
}
break;

case 0x6C:
case 0x6D:
INST_NAME("INSD");
INST_NAME(opcode == 0x6C ? "INSB" : "INSD");
SETFLAGS(X_ALL, SF_SET); // Hack to set flags in "don't care" state
GETIP(ip);
STORE_XEMU_CALL(xRIP);
CALL(native_priv, -1);
LOAD_XEMU_CALL(xRIP);
jump_to_epilog(dyn, 0, xRIP, ninst);
*need_epilog = 0;
*ok = 0;
break;
case 0x6E:
case 0x6F:
INST_NAME(opcode == 0x6C ? "OUTSB" : "OUTSD");
SETFLAGS(X_ALL, SF_SET); // Hack to set flags in "don't care" state
GETIP(ip);
STORE_XEMU_CALL(xRIP);
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25 changes: 25 additions & 0 deletions src/dynarec/rv64/dynarec_rv64_00_1.c
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Expand Up @@ -263,6 +263,31 @@ uintptr_t dynarec64_00_1(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int
}
break;

case 0x6C:
case 0x6D:
INST_NAME(opcode == 0x6C ? "INSB" : "INSD");
SETFLAGS(X_ALL, SF_SET); // Hack to set flags in "don't care" state
GETIP(ip);
STORE_XEMU_CALL(x3);
CALL(native_priv, -1);
LOAD_XEMU_CALL();
jump_to_epilog(dyn, 0, xRIP, ninst);
*need_epilog = 0;
*ok = 0;
break;
case 0x6E:
case 0x6F:
INST_NAME(opcode == 0x6C ? "OUTSB" : "OUTSD");
SETFLAGS(X_ALL, SF_SET); // Hack to set flags in "don't care" state
GETIP(ip);
STORE_XEMU_CALL(x3);
CALL(native_priv, -1);
LOAD_XEMU_CALL();
jump_to_epilog(dyn, 0, xRIP, ninst);
*need_epilog = 0;
*ok = 0;
break;

#define GO(GETFLAGS, NO, YES, F) \
READFLAG 10000 S(F); \
i8 = F8S; \
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77 changes: 6 additions & 71 deletions src/emu/x64run.c
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Expand Up @@ -515,78 +515,13 @@ int Run(x64emu_t *emu, int step)
GD->q[0] = imul32(emu, ED->dword[0], (uint32_t)tmp64s);
break;
case 0x6C: /* INSB DX */
if(rex.is32bits) {
tmp32u = rep?R_ECX:1;
while(tmp32u--) {
*(int8_t*)(R_EDI+GetESBaseEmu(emu)) = 0; // faking port read, using explicit ES segment
if(ACCESS_FLAG(F_DF))
R_EDI-=1;
else
R_EDI+=1;
}
if(rep)
R_ECX = 0;
} else {
// this is a privilege opcode in 64bits, but not in 32bits...
#ifndef TEST_INTERPRETOR
emit_signal(emu, SIGSEGV, (void*)R_RIP, 0);
STEP;
#endif
}
break;
case 0x6D: /* INSL DX */
if(rex.is32bits) {
tmp32u = rep?R_ECX:1;
while(tmp32u--) {
*(int32_t*)(R_EDI+GetESBaseEmu(emu)) = 0; // faking port read, using explicit ES segment
if(ACCESS_FLAG(F_DF))
R_EDI-=4;
else
R_EDI+=4;
}
if(rep)
R_ECX = 0;
} else {
// this is a privilege opcode in 64bits, but not in 32bits...
#ifndef TEST_INTERPRETOR
emit_signal(emu, SIGSEGV, (void*)R_RIP, 0);
STEP;
#endif
}
break;
case 0x6D: /* INSD DX */
case 0x6E: /* OUTSB DX */
if(rex.is32bits) {
// faking port write, using explicit ES segment
if(ACCESS_FLAG(F_DF))
R_ESI-=rep?R_ECX:1;
else
R_ESI+=1?R_ECX:1;
if(rep)
R_ECX = 0;
} else {
// this is a privilege opcode in 64bits, but not in 32bits...
#ifndef TEST_INTERPRETOR
emit_signal(emu, SIGSEGV, (void*)R_RIP, 0);
STEP;
#endif
}
break;
case 0x6F: /* OUTSL DX */
if(rex.is32bits) {
// faking port write, using explicit ES segment
if(ACCESS_FLAG(F_DF))
R_ESI-=(rep?R_ECX:1)*4;
else
R_ESI+=(rep?R_ECX:1)*4;
if(rep)
R_ECX = 0;
} else {
// this is a privilege opcode in 64bits, but not in 32bits...
#ifndef TEST_INTERPRETOR
emit_signal(emu, SIGSEGV, (void*)R_RIP, 0);
STEP;
#endif
}
case 0x6F: /* OUTSD DX */
#ifndef TEST_INTERPRETOR
emit_signal(emu, SIGSEGV, (void*)R_RIP, 0);
STEP;
#endif
break;

GOCOND(0x70
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0