8000 [DYNAREC_RV64] Fixed shift masks for GI by xctan · Pull Request #1160 · ptitSeb/box64 · GitHub
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[DYNAREC_RV64] Fixed shift masks for GI #1160

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Merged
merged 3 commits into from
Dec 24, 2023
Merged

[DYNAREC_RV64] Fixed shift masks for GI #1160

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cb56b56
[DYNAREC_RV64] Fixed SHLD for GI
xctan Dec 24, 2023
152b4a5
[DYNAREC_RV64] Fixed SHRD for GI
xctan Dec 24, 2023
59492b7
[DYNAREC_RV64] Fixed shamt mask of 16-bit shifts
xctan Dec 24, 2023
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14 changes: 7 additions & 7 deletions src/dynarec/rv64/dynarec_rv64_66.c
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Original file line number Diff line number Diff line change
Expand Up @@ -887,13 +887,13 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni
SETFLAGS(X_ALL, SF_PENDING);
GETEW(x1, 1);
u8 = F8;
UFLAG_IF {MOV32w(x2, (u8&0x1f));}
UFLAG_IF {MOV32w(x2, (u8&15));}
UFLAG_OP12(ed, x2)
if(MODREG) {
SLLI(ed, ed, 48+(u8&0x1f));
SLLI(ed, ed, 48+(u8&15));
SRLI(ed, ed, 48);
} else {
SLLI(ed, ed, u8&0x1f);
SLLI(ed, ed, u8&15);
}
EWBACK;
UFLAG_RES(ed);
Expand All @@ -905,9 +905,9 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni
SETFLAGS(X_ALL, SF_PENDING);
GETEW(x1, 1);
u8 = F8;
UFLAG_IF {MOV32w(x2, (u8&0x1f));}
UFLAG_IF {MOV32w(x2, (u8&15));}
UFLAG_OP12(ed, x2)
SRLI(ed, ed, u8&0x1f);
SRLI(ed, ed, u8&15);
EWBACK;
UFLAG_RES(ed);
UFLAG_DF(x3, d_shr16);
< D42D /a> Expand All @@ -918,9 +918,9 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni
UFLAG_IF {MESSAGE(LOG_DUMP, "Need Optimization for flags\n");}
GETSEW(x1, 1);
u8 = F8;
UFLAG_IF {MOV32w(x2, (u8&0x1f));}
UFLAG_IF {MOV32w(x2, (u8&15));}
UFLAG_OP12(ed, x2)
SRAI(ed, ed, u8&0x1f);
SRAI(ed, ed, u8&15);
if(MODREG) {
ZEXTH(ed, ed);
}
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2 changes: 2 additions & 0 deletions src/dynarec/rv64/dynarec_rv64_emit_shift.c
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Original file line number Diff line number Diff line change
Expand Up @@ -497,6 +497,7 @@ void emit_ror32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, uint32_t c,
// emit SHRD32 instruction, from s1, fill s2 , constant c, store result in s1 using s3 and s4 as scratch
void emit_shrd32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, uint32_t c, int s3, int s4)
{
c&=(rex.w?0x3f:0x1f);
CLEAR_FLAGS();

IFX(X_PEND) {
Expand Down Expand Up @@ -562,6 +563,7 @@ void emit_shrd32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, uin
}

void emit_shld32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, uint32_t c, int s3, int s4, int s5) {
c&=(rex.w?0x3f:0x1f);
CLEAR_FLAGS();
IFX(X_PEND) {
if (c) {
Expand Down
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