8000 [LA64_DYNAREC] Fixed LOCK XCHG byte opcode fallback path by ksco · Pull Request #1519 · ptitSeb/box64 · GitHub
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[LA64_DYNAREC] Fixed LOCK XCHG byte opcode fallback path #1519

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May 22, 2024
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38 changes: 34 additions & 4 deletions src/dynarec/la64/dynarec_la64_00.c
Original file line number Diff line number Diff line change
Expand Up @@ -772,7 +772,7 @@ uintptr_t dynarec64_00(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni
emit_test32(dyn, ninst, rex, ed, gd, x3, x4, x5);
break;
case 0x86:
INST_NAME("(LOCK)XCHG Eb, Gb");
INST_NAME("(LOCK) XCHG Eb, Gb");
nextop = F8;
if (MODREG) {
GETGB(x1);
Expand All @@ -786,9 +786,39 @@ uintptr_t dynarec64_00(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni
AMSWAP_DB_B(x1, gd, ed);
else {
SMDMB();
LD_BU(x1, ed, 0);
ST_B(gd, ed, 0);
SMDMB();

// calculate shift amount
ANDI(x1, ed, 0x3);
SLLI_D(x1, x1, 3);

// align address to 4-bytes to use ll.w/sc.w
ADDI_D(x4, xZR, 0xffc);
AND(x6, ed, x4);

// load aligned data
LD_WU(x5, x6, 0);

// insert gd byte into the aligned data
ADDI_D(x4, xZR, 0xff);
SLL_D(x4, x4, x1);
NOR(x4, x4, xZR);
AND(x4, x5, x4);
SLL_D(x5, gd, x1);
OR(x4, x4, x5);

// do aligned ll/sc sequence
MARKLOCK;
LL_W(x1, x6, 0);
MV(x5, x4);
SC_W(x5, x6, 0);
BEQZ_MARKLOCK(x5);

// calculate shift amount again
ANDI(x4, ed, 0x3);
SLLI_D(x4, x4, 3);

// extract loaded byte
SRL_D(x1, x1, x4);
}
BSTRINS_D(gb1, x1, gb2 + 7, gb2);
}
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