Verilog (and Hardware Description Languages in general) basics through code examples.
Verilog IEEE 1364 is one of the most popular HDLs. HDL is a language used to model and verify electronic circuits and systems. More on them later.
I think that HDLs lack good-for-start code examples and tutorials with descriptive how-to usage. So I decided to take a risk and make a repository of my experiments with Verilog. Do not consider this repository as a first-class place to learn Verilog and don't rely on it. I am certainly not a good maintainer in such unserious non-projects and I can leave it for good in a week or so.
AS IS, no warranties of any kind, no liability