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Technology dependent cells instantiated in the design for generic process (simulation, FPGA)
Peripheral Component Interconnect has taken Express lane long ago, going for xGbps SerDes. Now (for the first time) in opensource on the Host side! Our project roots for Root Complex in 4 ways: 1) …
Johnson-Nyquist Noise Based Multi-Purpose Hardware Random Number Generator
Verilog to Routing -- Open Source CAD Flow for FPGA Research
Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.
betfairlightweight - Betfair API-NG python wrapper (with streaming)
Unofficial reference for the NHL API endpoints.
DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow video controller with alpha-blended layers. Docs & TBs included.
A template project for beginning new Chisel work
Chisel: A Modern Hardware Design Language
Embedded Scalable Platforms: Heterogeneous SoC architecture and IP integration made easy
The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
A Networking Guide for getting started with basic/core network components such as wired and wireless network design, configuration, hardware, protocols, security, backup, recovery, and virtualizat…
Fault-tolerant, highly scalable GPU orchestration, and a machine learning framework designed for training models with billions to trillions of parameters
Geontech / corundum
Forked from corundum/corundumOpen source FPGA-based NIC and platform for in-network compute
AMD Xilinx University Program Embedded tutorial
FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations
Open source FPGA-based NIC and platform for in-network compute
realtimeradio / hdl
Forked from analogdevicesinc/hdlHDL libraries and projects