This github repository contains the following FPGA based lab experiments
- Sorting algorithm implementation
- Hashing algorithm implementation
- SPI sensor integration to FPGA
The experiments are targeted to be implemented using Intel MAX10 FPGA.
The projects are organised in the following structure
- project_name
- src - contains HDL - Verilog/VHDL source code
- par - Place & Route folder. This folder contains all the Quartus tool generated files.
- doc - documents and project requirement files
- sim - testbench & simulation output files
Lab experiments are created for Finolex Academy of Management & Technology (www.famt.ac.in)