Lists (11)
Stars
Tiny ASIC implementation for "The Era of 1-bit LLMs All Large Language Models are in 1.58 Bits" matrix multiplication unit
Minimal implementation of Microsoft's BitNet b1.58 2B4T
A tool for verifying RTL and FPGA models using custom SW applications
Verification of RISC-V Processor Core(s) using S2QED.
magma port of https://github.com/ucb-bar/chisel-tutorial
A Python package for testing hardware (part of the magma ecosystem)
Lake is a framework for generating synthesizable memory modules from a high-level behavioral specification and widely-available memory macros.
ekiwi / essent
Forked from ucsc-vama/essenthigh-performance RTL simulator
Open source RTL simulation acceleration on commodity hardware
Minimax: a Compressed-First, Microcoded RISC-V CPU
GPGPU processor supporting RISCV-V extension, developed with Chisel HDL
First-Class GPU Resource Management: Device Drivers, Runtimes, and CUDA Compilers for Nouveau.
Thunder gives you PyTorch models superpowers for training and inference. Unlock out-of-the-box optimizations for performance, memory and parallelism, or roll out your own.
A framework to enable multimodal models to operate a computer.
Distributed Asynchronous Hyperparameter Optimization in Python
A small but efficient C++ library for computing (customized) tree and hypertree decompositions.
A quick guide (especially) for trending instruction finetuning datasets
Attention Kernels for Symmetric Power Transformers
ModelScope-Agent: An agent framework connecting models in ModelScope with the world