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Vitis-HLS-Introductory-Examples Public
Forked from Xilinx/Vitis-HLS-Introductory-ExamplesC++ Other UpdatedApr 24, 2024 -
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hdl Public
Forked from analogdevicesinc/hdlHDL libraries and projects
Verilog Other UpdatedMar 2, 2022 -
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linux-xlnx Public
Forked from Xilinx/linux-xlnxThe official Linux kernel from Xilinx
C Other UpdatedApr 5, 2019 -
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hdmi_pass_through_ZyboZ7-10 Public
Forked from dpaul24/hdmi_pass_through_ZyboZ7-10This is a simple design example showing how a HDMI signal can be passed through a FPGA without any type of processing on it. The Digilent Zybo Z7-10 development board has been used.
VHDL MIT License UpdatedAug 17, 2018 -
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implementation files for zed board , can be used for other image processing IP generated by HLS
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sobel_filter_HLS Public
sobel filter implementation on hls with DMA for using AXI DMA for implementation
LLVM UpdatedAug 15, 2018 -
Deep-Neural-Network-Hardware-Accelerator Public
Forked from StefanSredojevic/Deep-Neural-Network-Hardware-AcceleratorSystemVerilog HDL and TB code Deep Neural Network Hardware Accelerator implementation on zybo 7010 FPGA and also C code for Vivado SDK Software
SystemVerilog UpdatedJun 16, 2018 -
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Lecture-Slides Public
Forked from HandsOnOpenCL/Lecture-SlidesLecture Slides opencl
Other UpdatedMay 20, 2018 -
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computerArchitecture-bits Public
computer architecture project files bits course
Verilog UpdatedMay 13, 2018 -
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hfbs Public
Forked from uwsampa/hfbsa hardware-friendly bilateral solver
Python MIT License UpdatedDec 8, 2017 -
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pymutohedral_lattice Public
Forked from idofr/pymutohedral_latticeA python (numpy based) implementation of the original permutohedral lattice filtering code
Python GNU General Public License v3.0 UpdatedAug 29, 2017 -
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image-filter Public
Forked from frotms/image-filtersome filters (boxfilter, fast bilateral filter, fast guided filter and permutohedral bilateral filter)
C++ UpdatedMar 18, 2017
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