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saw235 / servers
Forked from modelcontextprotocol/serversModel Context Protocol Servers
Create Customized Software using Natural Language Idea (through LLM-powered Multi-Agent Collaboration)
The Rapid Open Hardware Development (ROHD) framework is a framework for describing and verifying hardware in the Dart programming language.
VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!
SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows
CNF encoding algorithms for arithmetical operations
Everything related to VHDL design. Image Filters, PS/2 Keyboard Controller, VGA Controller...
FuseSoC template for starting a SystemVerilog design project with simple Verilator Testbench
Common (and maybe generic) components for SystemVerilog with FuseSoc support
Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server
A Just-In-Time Compiler for Verilog from VMware Research
Experiments towards neural network theorem proving
Artificial intelligence for the Snake game.
Flash Automation in a Browser with JavaScript, C++, Python or AutoHotkey
Using machine learning to find the best pick in a draft (League of Legends)
Go implementation of the Ethereum protocol
a 2D rigid body physics engine for the web ▲● ■
Python module to get real-time stock data from Google Finance API