8000 sdikiy (Serhii Dykyi) / Starred · GitHub
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Showing results
163 17 Updated Dec 19, 2023

Simple OTDR SOR file parser written in Python

Python 83 33 Updated Feb 29, 2024

schematics and other files relating to the hardware of our cape for the beaglebone

9 Updated Nov 6, 2019

Laboratory works for digital electronics course in Kyiv Polytechnic Institute, Department of Design of Electronic Digital Equipment, Electronics faculty

Verilog 30 16 Updated Nov 18, 2019

Official Docker image for QGIS Server and Desktop

Python 89 27 Updated Apr 9, 2025

Xilinx Virtual Cable (XVC) is a TCP/IP-based protocol that acts like a JTAG cable and provides a means to access and debug your FPGA or SoC design without using a physical cable.

C 242 84 Updated May 13, 2024

micro read line library for small and embedded devices

C 256 82 Updated Oct 29, 2023

Flashing Pano Logic thin clients without a programmer

C++ 40 6 Updated May 20, 2022

Prototype time domain reflectometer/sampling oscilloscope

HTML 51 11 Updated Apr 26, 2019

zx spectrum48 fpga xilinx

SystemVerilog 6 2 Updated Sep 24, 2020

Sinclair ZX Spectrum 48k and 128k on an Altera DE1 FPGA board

VHDL 43 15 Updated Jan 13, 2016

ESP32/8266 Arduino as (X)SVF JTAG programmer

C 44 12 Updated Nov 28, 2018

Simulation of the classic Pacman arcade game on a PanoLogic thin client.

VHDL 33 10 Updated Nov 3, 2019

Constraints file and Verilog demo code for the Pano Logic Zero Client G2

Verilog 17 5 Updated Dec 4, 2018

A repository for a random collection of stuff pertaining to reverse engineering the Pano Logic G2 "zero" client

34 4 Updated Dec 12, 2018

Pano Logic G2 Reverse Engineering Project

Verilog 140 21 Updated May 13, 2021

Information about eeColor Color3 HDMI FPGA board

Verilog 26 2 Updated Jan 22, 2020

PanoLogic Zero Client G1 reverse engineering info

Verilog 74 11 Updated Apr 2, 2024

Simple OTDR SOR file parser (Perl)

Perl 20 7 Updated Sep 23, 2017

stm32f103c8t6 spectrum emulator

C 46 7B8D 9 Updated Dec 20, 2020

TI TUBS3410 USB cleint Stack + USB Blaster Clone

C 7 2 Updated Aug 7, 2018

An OpenSource Boundary Scan Test System (JTAG / IEEE1149.x)

Ada 32 4 Updated May 5, 2025

A Grako-based parser for IEEE 1149.1 Boundary-Scan Description Language (BSDL) files

Python 24 12 Updated Nov 22, 2020

FMCW radar design files

C 188 65 Updated Dec 22, 2016

FMCW radar design files

KiCad Layout 154 45 Updated Oct 30, 2016

Replica of MK-61 programmable calculator is based on a cycle-accurate model of legacy ICs running on a modern microcontroller.

C 41 4 Updated Nov 24, 2023

Android USB host serial driver library for CDC, FTDI, Arduino and other devices.

Java 5,183 1,625 Updated Apr 18, 2025

Android 3.x USB Host Serial Driver

Java 120 66 Updated Oct 1, 2013

QGIS Plugin for OGC Web Feature Service 2.0.0

Python 11 7 Updated Aug 3, 2022
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