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Science
- Alameda, CA
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17:52
(UTC -06:00)
Highlights
- Pro
Stars
VS Code based debugger for hardware designs in Amaranth or Verilog
RFCs for changes to the Amaranth language and standard components
Industry standard I/O for Amaranth HDL
System on Chip toolkit for Amaranth HDL
SD-Card controller, using either SPI, SDIO, or eMMC interfaces
Amaranth simulation and verification utilities (alpha!)
OP Vault ChatGPT: Give ChatGPT long-term memory using the OP Stack (OpenAI + Pinecone Vector Database). Upload your own custom knowledge base files (PDF, txt, epub, etc) using a simple React frontend.
Documenting the Xilinx 7-series bit-stream format.
Envision a future where every student can read all the code of a teaching operating system.
Build Customized FPGA Implementations for Vivado
assorted library of utility cores for amaranth HDL
Board definitions for Amaranth HDL
A modern hardware definition language and toolchain based on Python
Experimental flows using nextpnr for Xilinx devices
Project F brings FPGAs to life with exciting open-source designs you can build on.
Verilator open-source SystemVerilog simulator and lint system
A wrapper to provide methods of the CPython 'smbus' module on micropython
Tool to fix FT2232's uart interface configuration for ecp5evn (LFE5UM5G-85F-EVN) board
A cd command that learns - easily navigate directories from the command line
slagernate / plugin-GUI
Forked from open-ephys/plugin-GUIOpen Ephys GUI with plugin architecture