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1.0.0

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Release 1.0.0

1.0.0-test.6

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fix index update on append

1.0.0-test.5

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Update .gitlab-ci.yml

1.0.0-test.4

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Update .gitlab-ci.yml

1.0.0-test.3

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Merge branch 'feat-index-merge' into 'dev'

Feat index merge

See merge request smartme.io/arancino/ide/arancino-esp32-core!2

1.0.0-test.2

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minor fixes to platform.txt file:

* fixing esptool_py upload path so to use the download package
* dropping xtensa-esp32 runtime toolchain paths since are detected by the recipe itself

1.0.0-test.1

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adding support for esp32s2 and esp32c3 MCUs to arancino ESP32 core

2.0.2-base

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Implement SigmaDelta based on ESP-IDF API (espressif#6053)

Summary

This PR is refactoring of SigmaDelta HAL in order to use IDF instead of current Register manipulation approach.

Impact

Change in API:

uint32_t sigmaDeltaSetup(uint8_t channel, uint32_t freq);
changed to -->
uint32_t sigmaDeltaSetup(uint8_t pin, uint8_t channel, uint32_t freq);

void sigmaDeltaAttachPin(uint8_t pin); removed, no longer needed. Pin is attached in sigmaDeltaSetup()
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