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Vulkan benchmark

C++ 207 33 Updated Jun 24, 2025

Safe interop between Rust and C++

Rust 6,370 372 Updated Jul 1, 2025

A protoc plugin for implementing the slog.LogValuer interface on proto messages

Go 5 2 Updated Apr 5, 2025

Modern dev tools for Tcl • includes a linter, formatter, and editor integration.

Python 59 6 Updated Jun 25, 2025

Unit tests generator for RVV 1.0

Go 88 30 Updated May 13, 2025

XLS: Accelerated HW Synthesis

C++ 1,318 203 Updated Jul 14, 2025

A matrix extension proposal for AI applications under RISC-V architecture

Makefile 148 28 Updated Feb 11, 2025

Tracking RISC-V Actions on Education, Training, Courses, Monitorships, etc.

943 96 Updated Jan 20, 2025

The Modular Platform (includes MAX & Mojo)

Mojo 24,496 2,661 Updated Jul 11, 2025

OpenEmbedded/Yocto layer for RISC-V Architecture

BitBake 395 153 Updated Jul 8, 2025

GPGPU processor supporting RISCV-V extension, developed with Chisel HDL

Scala 765 96 Updated Jul 8, 2025

Spatz is a compact RISC-V-based vector processor meant for high-performance, small computing clusters.

C 112 24 Updated Jul 12, 2025

Matiso - Material components for Miso

Haskell 7 Updated Jan 15, 2022

Simple demonstration of using the RISC-V Vector extension

Assembly 45 12 Updated Apr 18, 2024
Verilog 1,584 339 Updated Jul 13, 2025

GPL v3 2D/3D graphics engine in verilog

VHDL 669 146 Updated Aug 31, 2014

List of awesome open source hardware projects

Python 353 28 Updated Jan 2, 2023

OpenSource GPU, in Verilog, loosely based on RISC-V ISA

SystemVerilog 1,041 119 Updated Nov 22, 2024

Vivado board files for the Kintex 7 HPC V2 FPGA board.

26 9 Updated Jul 31, 2020

NVIDIA Linux open GPU kernel module source

C 15,980 1,430 Updated Jul 7, 2025

PCB for ULX4M FPGA R&D board

ANTLR 51 6 Updated Apr 4, 2025

FPGA GPU design for DE1-SoC

C 72 9 Updated Dec 27, 2021

FPGA Haskell machine with game changing performance. Reduceron is Matthew Naylor, Colin Runciman and Jason Reich's high performance FPGA softcore for running lazy functional programs, including har…

Haskell 437 34 Updated Apr 28, 2025

STLV7325 development board with a Xilinx XC7K325T Kintex-7 FPGA. Available on AliExpress.

Python 3 1 Updated Feb 2, 2022
SystemVerilog 46 17 Updated Oct 30, 2021

Python script to manage a Sony DPT-RP1 without the Digital Paper App

Python 558 139 Updated Jan 6, 2025

Cyclone V bitstream reverse-engineering project

HTML 125 15 Updated Oct 19, 2023

Tile based architecture designed for computing efficiency, scalability and generality

SystemVerilog 262 68 Updated Jun 17, 2025
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