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Xst Reader is an open source viewer for Microsoft Outlook’s .ost and .pst files, written entirely in C#. To download an executable of the current version, go to the releases tab.

C# 567 95 Updated Sep 11, 2023

simple terminal UI for git commands

Go 60,184 2,061 Updated May 18, 2025

The tutorial includes practical examples of memory initialization using coefficient (.coe) files

Python 2 Updated Oct 31, 2024

Learn how to design and implement a Numerically Controlled Oscillator (NCO) in Vivado using a block design approach!

VHDL 2 Updated Nov 6, 2024

CORDIC IP Tutorial: Creating NCO for Sine and Cosine Generation in Vivado

VHDL 3 Updated Jan 7, 2025

build a complete analog signal processing system with XADC using PYNQ Z2 FPGA board.

Jupyter Notebook 2 Updated Apr 14, 2025

FFT_Tutorial

Jupyter Notebook 3 1 Updated Mar 8, 2025
1 Updated Apr 18, 2025

freeCodeCamp.org's open-source codebase and curriculum. Learn math, programming, and computer science for free.

TypeScript 418,099 40,113 Updated May 18, 2025

Xilinx Tcl Store

Tcl 357 191 Updated May 3, 2025

The official Xilinx u-boot repository

C 627 806 Updated May 17, 2025

Python Productivity for ZYNQ

Jupyter Notebook 2,130 834 Updated Apr 29, 2025
Jupyter Notebook 13 3 Updated Nov 30, 2023

Юзкейсы по ИИ-тулзам от сообщества "Эволюция Кода"

49 4 Updated Jul 30, 2024

A huge collection of VHDL/Verilog open-source IP cores scraped from the web

482 144 Updated Jan 18, 2023

File icons for Sublime Text

JavaScript 1 Updated Jul 4, 2018

SublimeLinter plugin for using ModelSim/QuestaSim vcom to lint VHDL

Python 1 Updated Aug 11, 2018

Select a formula and evaluate it using python.

Python 1 Updated Oct 7, 2018
Tcl 1 Updated Feb 11, 2019

A sans-io python implementation of the Highway Addressable Remote Transducer Protocol

Python 1 Updated Aug 5, 2024

An Open-Hardware CGRA for accelerated computation on the edge.

Python 1 Updated Sep 12, 2024

A low power platform based on X-HEEP and integrating the ESL-CGRA

C 1 Updated Oct 8, 2024

Kria Vitis platforms and overlays

SystemVerilog 1 Updated Dec 10, 2024

eXtendable Heterogeneous Energy-Efficient Platform based on RISC-V

C 1 Updated Jan 21, 2025

Kria Vitis platforms and overlays

SystemVerilog 101 47 Updated May 17, 2025

An Open-Hardware CGRA for accelerated computation on the edge.

Python 25 7 Updated Sep 12, 2024

eXtendable Heterogeneous Energy-Efficient Platform based on RISC-V

C 181 100 Updated May 15, 2025
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