Tags: wzab/agwb
Tags
Fixed implementation of "rmw" for the register. Added description of bitfield, and register access functions.
The unintentional triggering of dispatch in the `finalize` method of the RMW_cache class has been eliminated. Now it enables really flexible handling of bitfields. However, there is one problem. It may be not possible to implement similar functionality in the real hardware interface. There is no place to store the vaules of the registers for longer time... It may mean that the optimization of the RMW operations must be limited to a sequence of writes to the bitfields belonging to the same register. If another register is accessed or if a read operation is performed, the current value of the register should be stored to the hardware...
That method of alternative inclusionm was finally rejected. Remained … …as a tag for completeness of documentation.
Added possibility to configure if "volatile" should be added to defin… …ed registers. Registers with bit-fields defined as union with uint32_t "raw" variable to ensure that they are never packed in a smaller variable. Replaced "packed" with "aligned(4)".
Added servicing of bitfields in Forth. If you are going to use Forth address map, due to mini-oof limitations you must ensure that all block and register names must be unique. Only ID and VER may be non-unique, but must be always defined as two first methods.