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axi Public
Forked from pulp-platform/axiAXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
SystemVerilog Other UpdatedJul 31, 2024 -
audio_video_streaming Public
Forked from 0voice/audio_video_streaming音视频流媒体权威资料整理，500+份文章，论文，视频，实践项目，协议，业界大神名单。
1 UpdatedMay 20, 2024 -
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OpenC910_Modified Public
Forked from Advanced-Microelectronics-Group/OpenC910_Modifiedcommit rtl and build cosim env
Verilog UpdatedFeb 18, 2024 -
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Asynchronous-Fifo Public
Forked from LindaYeyeye/Asynchronous-Fifoasynchronous fifo based on verilog
Verilog UpdatedApr 14, 2022 -
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ARM_AMBA_Design Public
Forked from lucky-wfw/ARM_AMBA_DesignBased on ARM AMBA bus protocol, Verilog is used to design the digital circuit.
Verilog GNU General Public License v3.0 UpdatedMay 14, 2021 -
Reindeer_Step Public
Forked from PulseRain/Reindeer_StepReindeer Soft CPU for Step CYC10 FPGA board
Verilog Other UpdatedDec 2, 2020 -
The-project-of-Verilog Public
Forked from lucky-wfw/The-project-of-VerilogSome design examples of Verilog about digital circuits
Verilog Other UpdatedNov 21, 2020 -
hdl Public
Forked from analogdevicesinc/hdlHDL libraries and projects
Verilog Other UpdatedAug 5, 2020 -
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APB-examples Public
Forked from zjxxyy/APB-examplesAPB
Verilog GNU General Public License v3.0 UpdatedMar 22, 2020 -
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AMY_MCU Public
Forked from sunyata000/AMY_MCUA MCU implementation based PODES-M0O
Verilog GNU Lesser General Public License v3.0 UpdatedJan 31, 2020 -
e200_opensource Public
Forked from SI-RISCV/e200_opensourceThe Ultra-Low Power RISC Core
Verilog Apache License 2.0 UpdatedJan 2, 2020 -
Digital_Front_End_Verilog Public
Forked from NingHeChuan/Digital_Front_End_VerilogVerilog UpdatedDec 7, 2019 -
wujian100_open Public
Forked from XUANTIE-RV/wujian100_openIC design and development should be faster，simpler and more reliable
Verilog MIT License UpdatedOct 26, 2019 -
CopyTranslator Public
Forked from CopyTranslator/CopyTranslatorForeign language reading and translation assistant based on copy and translate.
TypeScript GNU General Public License v2.0 UpdatedOct 21, 2019 -
AMBA_AXI_AHB_APB Public
Forked from adki/AMBA_AXI_AHB_APBAMBA bus lecture material
Verilog UpdatedSep 5, 2019 -
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cores Public
Forked from ultraembedded/coresVarious HDL (Verilog) IP Cores
Verilog UpdatedAug 17, 2019
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