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… an AbstractLogicalResourceInfo class
…package, updated tests, and added tests for new magic state logging
…ation cost and to check that cycles for multi-T-state-distilleries get accounted for properly
… bug in tocks accounting
…zapatacomputing/benchq into pj/DTA2-489/basic_active_volume_costing
Hello! So first things first I would have to put my objection to calling this "Active Volume" in writing. As the changes here work with a machine that doesn't satisfy all of the AV assumptions (single cycle bell state preparations and measurements being one of them). It would be much better to call this something like "All to all logical connectivity." |
src/benchq/compilation/graph_states/substrate_scheduler/substrate_scheduler.jl
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src/benchq/logical_architecture_modeling/graph_based_logical_architectures.py
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if node_to_patch[neighbor] < bar[1] && node in curr_physical_nodes | ||
bar[1] = node_to_patch[neighbor] | ||
end | ||
if node_to_patch[neighbor] > bar[2] & node in curr_physical_nodes | ||
if node_to_patch[neighbor] > bar[2] && node in curr_physical_nodes | ||
bar[2] = node_to_patch[neighbor] | ||
end |
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maybe this could be change to sth like:
if node in curr_physical_nodes bar[1] = min(bar[1], node_to_patch[neighbor]) bar[2] = max(bar[2], node_to_patch[neighbor]) end
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Thanks @KaterinaGratsea! Do you mind explaining this suggestion a bit more? What is the problem that it solves?
🚀 Code Coverage
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Description
This PR solves the issue of how alternative logical architecture models (in particular an
active volumeall-to-all architecture) can be modeled in benchq.(Note: we've updated the architecture name to "all-to-all" thanks to @AthenaCaesura's helpful suggestion)
Context
Previous methodologies in benchq for determining the cost of graph state preparation assumed a fixed 2D connectivity of logical qubits. Moreover, only the two-row bus logical architecture (a row of data qubits and a row of bus qubits) was being modeled. However, for some physical architectures the physical qubits can connect to more distant physical qubits. Ion trap elementary logical units, for example, can facilitate beyond 2D interactions between ELUs. Simon and Ilia are interested in demonstrating the resource reductions afforded by this connectivity.
Approach
One approach to leveraging this beyond-2D connectivity is to compile to an “active volume” architecture (similar to this). The active volume architecture assumes that the logical data qubits can be "re-ordered" (either for free, or ,in the case of the Litinski paper, with some small overhead). Simon Devitt has outlined an approach to modifying the accounting of graph state creation cost within benchq for the purposes of compiling to an active volume architecture. For simplicity, we will neglect the cost of reordering the data qubits (which is analogous to assuming an all-to-all connectivity). In the future we plan to incorporate the costs of reordering. There are two main accounting changes:
Temporal: updating the number of tocks per graph state creation
Currently, the julia functions time_optimal_two_row_scheduler and space_optimal_two_row_scheduler in benchq count the number of graph state creation tocks based on the two-row lay-out. For the active volume accounting, analogs of these functions would need to count the number of tocks according to a relaxed notion of co-measurable stabilizers.
Spatial: updating accounting of the number of data and bus qubits
The number of data qubits in the active volume architecture is supposed to be the maximum number of nodes in the graph among the graphs over each layer. This is because the bus is not needed to facilitate long-range stabilizer measurements. Instead, the data qubits can be connected in any manner and so a single stabilizer measurement involves choosing a linear connectivity over the qubits and using lattice surgery operations to make the stabilizer measurement.
Challenges
There were three main challenges with implementing this PR
Notes
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