Some re-arrangement and refining #2
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The standard virtio-mmio devices use notification register to signal backend. This will cause vmexits and slow down the performance when we passthrough the virtio-mmio devices to guest virtual machines. We proposed to update virtio over MMIO spec to add the per-queue notify feature VIRTIO_F_MMIO_NOTIFICATION. It can allow the VMM to configure notify location for each queue. Signed-off-by: Liu Jiang <gerry@linux.alibaba.com> Signed-off-by: Zha Bin <zhabin@linux.alibaba.com> Signed-off-by: Chao Peng <chao.p.peng@linux.intel.com> Signed-off-by: Jing Liu <jing2.liu@linux.intel.com>
- bit 39 is not for vring on all transport layer so we need do like what SRIOV does. - priv is changed to notify_addr which seems more explicit, and unify the vm_notify address. Feel free to discuss if you have different idea. Once tested, just squash into previous commit. Signed-off-by: Jing Liu <jing2.liu@linux.intel.com>
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January 20, 2020 23:10
Common functionality is refactored into virtio_mmio_common.h in order to MSI support in later patch set. Signed-off-by: Jing Liu <jing2.liu@linux.intel.com>
Create a generic irq domain for all architectures which supports virtio-mmio. The device offering VIRTIO_F_MMIO_MSI feature bit can use this irq domain. Signed-off-by: Jing Liu <jing2.liu@linux.intel.com>
The VIRTIO_F_MMIO_MSI feature bit (40) is used to indicate that device supports MSI for only MMIO transport layer. Signed-off-by: Jing Liu <jing2.liu@linux.intel.com>
Userspace VMMs (e.g. Qemu microvm, Firecracker) take advantage of using virtio over mmio devices as a lightweight machine model for modern cloud. The standard virtio over MMIO transport layer only supports one legacy interrupt, which is much heavier than virtio over PCI transport layer using MSI. Legacy interrupt has long work path and causes specific VMExits in following cases, which would considerably slow down the performance: 1) read interrupt status register 2) update interrupt status register 3) write IOAPIC EOI register We proposed to add MSI support for virtio over MMIO via new feature bit VIRTIO_F_MMIO_MSI which increases the interrupt performance for virtio multi-queue devices. Signed-off-by: Liu Jiang <gerry@linux.alibaba.com> Signed-off-by: Zha Bin <zhabin@linux.alibaba.com> Signed-off-by: Chao Peng <chao.p.peng@linux.intel.com> Signed-off-by: Jing Liu <jing2.liu@linux.intel.com>
Bit 1 in the return value of reading MsiState register indicates the MSI sharing mode that device uses. Bit 1 is 0: device uses non-sharing and fixed vector per event mapping. Bit 1 is 1: device uses sharing mode and dynamic mapping. For driver implementation, once device uses MSI sharing mode for not a high interrupt rate, let configuration event uses 1 vector and all queues use 1 vector. Signed-off-by: Jing Liu <jing2.liu@linux.intel.com>
Virtio-mmio supports a generic MSI irq domain for all archs. This patch adds the x86 architecture support. Signed-off-by: Jing Liu <jing2.liu@linux.intel.com>
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I refactored MSI related code with main changes as follows.
To simply reviewing, I just open the PR into master branch.
Please help test on your side, and re-arrange with previous notify patch set.