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University of Electronic Science and Technology of China
- Shenzhen, China
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08:36
(UTC +08:00)
Stars
Must-have verilog systemverilog modules
Implementations of DeepPlace, PRNet, HubRouter, PreRoutGNN and FlexPlanner.
Awesome Artificial Intelligence for Electronic Design Automation Papers.
Collection of digital hardware modules & projects (benchmarks)
Mulberry, an o1-like Reasoning and Reflection MLLM Implemented via Collective MCTS
A wrapper around kissat to support push/pop (performance would be bad)
A fork of the Kissat SAT solver with additional features. Supports incremental solving.
Bitwuzla is a Satisfiability Modulo Theories (SMT) solver for the theories of fixed-size bit-vectors, floating-point arithmetic, arrays and uninterpreted functions and their combinations. Its name …
Open source high performance IEEE-754 floating unit
LLM Evaluation Benchmark on Hardware Formal Verification
A Satisfiability Modulo Theories (SMT) solver for the theories of fixed-size bit-vectors, arrays and uninterpreted functions.
ABC: System for Sequential Logic Synthesis and Formal Verification
Recent papers related to hardware formal verification.