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  1. cocotbext-jtag cocotbext-jtag Public

    Verilog 3 1

  2. cocotbext-apb cocotbext-apb Public

    Verilog 2 1

  3. test_array_xcelium test_array_xcelium Public

    Python 1

  4. myhdl myhdl Public

    Forked from myhdl/myhdl

    The MyHDL development repository

    Python

  5. HLS_arbitrary_Precision_Types HLS_arbitrary_Precision_Types Public

    Forked from Xilinx/HLS_arbitrary_Precision_Types

    C++

  6. grlib-gpl-mirror grlib-gpl-mirror Public

    Forked from TUT-ASI/leon3-grlib-gpl-mirror

    Git mirror of Gaisler's GRLIB/LEON3/LEON5/NOELV releases

    VHDL

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Showing 10 of 61 repositories
  • spack Public Forked from spack/spack

    A flexible package manager that supports multiple versions, configurations, platforms, and compilers.

    daxzio/spack’s past year of commit activity
    Python 0 2,428 0 0 Updated May 16, 2025
  • yosys Public Forked from YosysHQ/yosys

    Yosys Open SYnthesis Suite

    daxzio/yosys’s past year of commit activity
    C++ 0 ISC 952 0 0 Updated May 15, 2025
  • PeakRDL-regblock Public Forked from SystemRDL/PeakRDL-regblock

    Generate SystemVerilog RTL that implements a register block from compiled SystemRDL input.

    daxzio/PeakRDL-regblock’s past year of commit activity
    Python 0 GPL-3.0 46 0 0 Updated May 15, 2025
  • riscv-gnu-toolchain Public Forked from riscv-collab/riscv-gnu-toolchain

    GNU toolchain for RISC-V, including GCC

    daxzio/riscv-gnu-toolchain’s past year of commit activity
    C 0 1,259 0 0 Updated May 15, 2025
  • cocotb Public Forked from cocotb/cocotb

    cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python

    daxzio/cocotb’s past year of commit activity
    Python 0 BSD-3-Clause 552 0 0 Updated May 14, 2025
  • sby Public Forked from YosysHQ/sby

    SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows

    daxzio/sby’s past year of commit activity
    Python 0 82 0 0 Updated May 14, 2025
  • pyfpga Public Forked from PyFPGA/pyfpga

    A Python package to use FPGA development tools programmatically.

    daxzio/pyfpga’s past year of commit activity
    Python 0 GPL-3.0 15 0 0 Updated May 12, 2025
  • daxzio/cocotbext-jtag’s past year of commit activity
    Verilog 3 1 0 0 Updated May 11, 2025
  • PeakRDL Public Forked from SystemRDL/PeakRDL

    Control and status register code generator toolchain

    daxzio/PeakRDL’s past year of commit activity
    Python 0 GPL-3.0 28 0 0 Updated May 2, 2025
  • Cores-VeeR-EL2 Public Forked from chipsalliance/Cores-VeeR-EL2

    VeeR EL2 Core

    daxzio/Cores-VeeR-EL2’s past year of commit activity
    SystemVerilog 0 Apache-2.0 82 0 0 Updated Apr 28, 2025

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